Abstract: A multiple-redundant computer system having multiple computational devices operating in synchronism, multiple voter circuits to provide voted memory reading operations for the devices, and multiple fault detection logic for the detection of failures of the computational devices. Fault status words generated by the fault detection logic are also subject to a voted read by the multiple computational devices, thereby permitting detection of errors in the fault detection logic itself, as well as in the computational devices. The module structure of the invention also permits removal and replacement of circuit modules, each including a computational device and fault detection logic, without disconnecting power from the entire system.