Abstract: Apparatus including a first edge having a cutout adjacently located between a pair of counter bore panels, a connector assembly including a connector having a mounting flange with a pair of inserts and a pair of guide pins. The pair of inserts adapted to receive and secure the pair of guide pins. Mounting flange adapted to abut a rear face of the first edge such that the connector extends through the cutout and the pair of inserts align with the pair of counter bore panels. The cutout and the pair of counter bore panels are slightly oversized for the connector and respective guide pins. Once the pair of guide pins is received by the pair of inserts the connector floats within a space defined by the cutout and pair of counter bore panels and the connector and pair of guide pins.

Abstract: The signal distortion present in a transmitted signal is measured and used to generate filter coefficients. The coefficients are stored in memory. A modulator generates an intermediate frequency signal. The modulator inputs the signal to a programmable predistortion filter. The characteristics of the filter are altered by the filter coefficients that have been programmed into the filter. The resulting filtered signal is upconverted to a frequency in a transmit frequency band.

Abstract: A clock compensation circuit is provided. The circuit comprises a clock synchronization circuit coupled to receive an input clock signal, wherein the clock synchronization circuit generates a master clock signal and produces a plurality of internal logic clock signals. The circuit further comprises a phase comparator coupled to receive one of the plurality of internal logic clock signals and a sample clock from an associated receiver, wherein the phase comparator generates a control signal based on a phase comparison between the sample clock and the one of the plurality of internal logic clock signals and a down converter channel coupled to receive each of the plurality of internal logic clock signals and the control signal and to pass data in phase with the sample clock using the internal logic clock signal based on the control signal.

Abstract: The present invention enables the self-diagnosis functionality by embedding a cable modem with the CMTS system with mechanisms to redirect the signals from external connections to the embedded cable modem, thereby enabling the end user to fully test the CMTS using a suite of diagnostic tests. The embedded cable modem integrates the external CM, computer and diagnostic software in the chassis, or alternatively onto the CMTS card in the chassis. The invention enables the end user to fully test the functionality as a stand-alone unit, without relying on any external test equipment or methods. It also enables the end user to diagnose the CMTS from a remote location. Another major advantage of the present invention is that it enables the CMTS/CM function to be verified over the entire physical layer parameter set (frequency, symbol rate, FEC, signal levels, etc.) while not interrupting any of the services that are on the ‘live’ HFC plant.

Abstract: A system and process for directly and flexibly switching connections of data packet flows between nodes of a broadband data processing system network. The system acts as a single IP switch.