Abstract: In a circuit for digital processing of audio signals in a radio receiver, preferably in a car radio, the audio signals pass through a digital filter designed as a tone control, whose frequency response can be controlled with supplied coefficients, and a volume control, whose transmission factor can be controlled with supplied control signals. If the high and/or low frequencies are raised, the transmission factor of the filter at medium frequencies can be correspondingly lowered. Volume control compensates for the reduction. The volume control may contain a digital and an analog portion.

Abstract: In a radio receiver with an input circuit which can be supplied with received signals, with a mixer for deriving an IF signal, and with an IF filter, the passband range corresponds to a usable signal range of the received signal, the received signals are amplitude-modified with an auxiliary signal for detecting intermodulation, in the course of which sidebands are generated outside of the useful signal range. The amplitudes of at least one sideband generated by modulation with the auxiliary signal and of the received carrier are compared in the IF signal. In case of deviations from a ratio based on the modulation factor during modulation with the auxiliary signal, a signal indicating the presence of intermodulation is derived.

Abstract: For a demodulator for radio data signals, where transmission of these signals is carried out through phase shifting of a suppressed subcarrier, where a multiplex signal, which contains a signal with the frequency of the subcarrier passes through a band-pass filter and an amplitude limiter, the amplitude-limited signal having a subcarrier frequency is transformed into digital sampling values, if necessary by additional filtering, and the sampling values are supplied to at least one phase control loop for deriving a bit clock signal.

Abstract: In a circuit for dividing the frequency of a received signal by an uneven number, initially another signal is derived through half-integer frequency division and thereafter divided by two. Preferably, a frequency division is performed alternately by an integer under the half-integer and by an integer above the half-integer, in order to achieve frequency division by a half-integer, whereby the toggling is performed dependent on the output signal.

Abstract: In a circuit for decoding a multiplex signal in a stereo receiver, where the multiplex signal contains a composite signal (L+R) in the base band, a subcarrier modulated with a difference signal (L-R), and a pilot signal with half the frequency of the subcarrier, the multiplex signal in digital form is multiplied (2, 3) by a reference carrier generated with a sampling clock signal (14) produced in the radio receiver, where the reference carrier is present in two phase positions shifted 90.degree. with respect to each other. The mix or product signals resulting from this multiplication are multiplied (4, 5) by one correction signal each, thus forming corrected mix signals. The corrected mix signals are added (6) and supplied to a matrix circuit (8, 9), together with the composite signal, to create respective stereo audio channel signals (L, R).

Abstract: Digital tuning of a locally generated frequency supplied to a frequency converting mixer, a mobile radio receiver is provided with great economy of components by utilizing the sampling rate oscillator for an analog-to-digital converter provided at the output of an analog intermediate frequency amplifier of the receiver as the source of the difference frequency for a phase locked loop (PLL) for control of the phase of a local oscillator for the mixer or mixers. All frequencies used to supply local oscillations to mixers, as well as the operating frequency of the phase locked loop are integer number multiples of the sampling rate pulse generator. Some division stages have fixed dividers and others have divisors selectable by a tuning processor and in some of the divisor connections it is useful to interpose a fixed or selectable-factor multiplier. A sampling rate of 42.75 MHz is recommended and an intermediate frequency amplifier frequency which is a rational number multiple of 57 kHZ, preferably 10.

Abstract: A radio data system (RDS) receiver has a station selector circuit including a microprocessor, several Alternative Frequency (AF) memory cells, and at least one learning memory cell associated with each AF memory cell. In a preferred embodiment, a counter is associated with each learning memory cell. The AF memory cells store alternative frequencies decoded from a Radio Data System signal. As each station is tuned successfully, i.e. with adequate signal strength, its frequency is stored in one of the learning memory cells. When signal deterioration requires a skip to a new frequency, the "skip frequencies" stored in the learning memory cells are preferred to other frequencies. The counters keep track of how many times, since power-up, each frequency has been successfully tuned, and the frequency with the highest count is the "most preferred" alternative frequency.

Abstract: In a demodulator for use in the Radio Data System (RDS) as defined by the European Broadcasting Union, transmission of these signals is carried out through phase shift modulation of a suppressed subcarrier, a multiplex signal, which contains a signal with the frequency of the subcarrier passes through a band-pass filter and an amplitude limiter, and the amplitude-limited signal, having a carrier frequency, is sampled at a sampling frequency that is a multiple of the frequency of the subcarrier. The sampling values are summed over a preset portion of one period of the subcarrier. The summed sampling values are supplied to a digital signal processing circuit.

Abstract: A new digital oscillator is described that can be synchronized with a broadcast digital input signal by iteratively rotating the phase of the complex oscillator signal by increasing or decreasing the components, depending upon the phase difference between the broadcast signal and the oscillator output signal.

Abstract: The Radio Data System (RDS) protocol promulgated by the European Broadcasting Union provides for alternate frequencies (AF) for the same broadcast. Receivers periodically switch over to such an alternate frequency, leading to momentary crackling noises. In a radio receiver having a device for temporary switchover from a received frequency to some other frequency, substitute signals are inserted into the audio signals that are interrupted during the temporary switchover. The substitute signals are formed from the audio signals before and optionally also after the temporary switchover.

Abstract: A VHF radio receiver intended for mobile use, e.g. in a car, features inputs from multiple antennas. Each antenna signal is mixed with a locally-generated oscillator signal; the resulting mixed signals are added, with controllable phase position, to form a summation signal. Alternate frequencies, as defined by the Radio Data System (RDS) international standard, are stored. At periodic time intervals, momentary switchover is made to alternate frequencies to measure their reception quality and to store this parameter. Whenever the originally-tuned frequency provides inadequate reception quality, a control circuit 19 switches over to the best of the alternate frequencies, so quickly that the changeover is almost imperceptible to the listener.

Abstract: A modularly-designed FM vehicle radio for operation in connection with a plurality of antennas is disclosed, where the summing circuit consists of a series connection of the secondary coils of the output transformers of the input stages.

Abstract: A mobile radio receiver, for example, a car radio, needs a circuit to detect and suppress adjacent-channel interference. This can be done by using bandpass filters (14) of differing bandwidth. The present invention dynamically adjusts bandwidth to an optimum value by continuously comparing (13) a first signal level, upstream of the bandpass filter, to a second signal level, downstream of the bandpass filter, to derive a difference value representative of adjacent-channel interference, then uses an electronically controlled selector switch (6) to select a particular filter (14.sub.N) whose bandwidth is sufficiently narrow to cut out the interfering broadcast signal. A table associating each magnitude range of interference with a particular filter bandwidth assures that bandwidth is broadened as interference diminishes, thereby assuring sufficient reception signal strength.

Abstract: A power supply circuit provides power to an antenna amplifier (4) of a vehicle radio via the antenna bushing (A) and the antenna cable (6). The circuit is resistant to short-circuits and has a pair of signal terminals (K2, K3) from which information, about the type of attached antenna and about its operating state, can be picked up.

Abstract: In an A/D converter for electrical signals, the difference, between the instantaneous analog input signal Y(t) and a previous analog signal value Y(t-T), is converted in a fast analog-to-digital converter (3) to a digital sum value. This sum value is added to the preceding digital value, stored in a buffer memory (7, 7'), and the result is fed to a slow but precise D/A converter (2) for generation of the next Y(t-T) value. This has the advantage that good results can be obtained with A/D converters less expensive than those heretofore required to obtain such results.

Abstract: In a circuit arrangement for deriving a binary signal from an alternating voltage (U), in which the alternating voltage can be delivered via a capacitor to the input of a threshold value circuit and a reference voltage obtained by integration serves to adjust the operating point at the input, an up/down counter is provided for deriving the reference voltage, its counting direction being controllable by the binary signal. From the output signal of the up/down counter, a further binary signal is derived, which after integration forms the reference voltage. The circuit is suitable for use in evaluating the data subcarrier component of a Radio Data System (RDS) signal, as defined by European Broadcasting Union (EBU) Technical Standard 3244-E.

Abstract: A novel receiver for subcarriers in a radio broadcasting system is described, in which the characteristic frequency of the mixing oscillator is varied under program control. An incoming signal from antenna 1 passes through an input stage 2 to a mixing stage 3. Mixing stage 3 receives the output of an oscillator 4. The output of the mixing stage passes into an intermediate frequency filter stage 5, which preferably includes A/D converters 13 and demultiplexers 14. Stage 5 feeds a plurality of demodulators 6, which may include equalizers 12. Buffer memories 7 store information from demodulated subcarrier signals, and feed an evaluation unit 8. Evaluation unit 8 has a first output which drives a speaker 9 and a second output which is applied to a memory 11. A control unit 10, connected to the output of memory 11, controls the frequency generated by mixing oscillator 4.

Abstract: A combination of automobile radio and city call or paging receiver equipped with a display (4) has the additional feature of a vehicle speed sensor (24) which is used to block display of possibly distracting information whenever the vehicle exceeds a predetermined speed limit set in a threshold switch (25). The display (4) is controlled by a microprocessor (7). A NAND gate (23), connected to the output of the speed threshold switch (25), is interposed between the city call data decoder (3) and the microprocessor (7). Another threshold stage (28) and NAND gate (27) can be interposed between the radio control panel (18) and the radio tuner (13) to keep the driver from making radio adjustments when he or she should be paying attention to the road instead.

Abstract: On the rear side of the front panel (1) of an electronic equipment, at each lateral end which overlaps an edge of an aperture (3) into which the electronic equipment is being inserted, bushings (5) having rearwardly extending catch members (6) are fastened to the rear of the front panel by screws (12). The bushings are of resilient synthetic plastic. The catch members are disposed around a continuation of the central bore of the bushing. Stepped bores (14) are provided in the wall portion overlapped by the front panel. When the bushings are inserted into these stepped bores the catch members are first deflected inwards and then, as they reach their final position, spring outwards and catch against the step (16) of the bore (14). Mating projections (9) and openings (10) lock each bushing against rotation as it is screwed on to the front panel (1).

Abstract: Sample values of a digital signal of a first sample rate are supplied to a digital filter for conversion into a digital signal of a second sample rate. The coefficients of the digital filter are calculated by a processor from the ratio of the sample rates or are obtained by a read-only memory containing sets of coefficients for respective sample rate ratios for which the apparatus is usable. Filtered sample values are read out of the digital filter at the desired second sample rate. A buffer memory is used at the input of the digital filter and a regulator is provided to prevent fluctuations in the filling of the buffer memory from emptying or exceeding the capacity of the buffer memory.