Patents Assigned to BPM Microsystems
  • Patent number: 11643286
    Abstract: The operator may first place a blank device in a first socket in a first site. The APS may self-teach the position and orientation of that first socket by removing and replacing the device in the socket one or more times, and by detecting the position of the device in the socket or by monitoring a change in position of the device as it is placed into the socket. The APS then picks the device from the first socket (or from the input tray) and moves it in succession through the rest of the sockets to establish position and orientation of each socket. After all sockets are taught, the APS loads all sockets with blank devices, and programming begins. Alternatively, the programming job begins as each site is taught and before the remaining sites are taught so that production output can begin “immediately.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: May 9, 2023
    Assignee: BPM MICROSYSTEMS
    Inventors: William H. White, Alain A. Mangiat, Josué E. Salazar Vanoye, Colin D. Harper
  • Patent number: 10930532
    Abstract: An object detection system utilizes a teach cycle performed with a low-pressure blow-off (i.e. positive pressure) instead of vacuum (negative pressure). During the teach operation, the positive pressure is enabled and the nozzle is lowered to the object. An air sensor detects pressure or flow at the nozzle tip. A rise in pressure or drop in flow is detected as the nozzle makes contact with the object (i.e. just before or just after actual physical contact is made). The height of the object is stored as the taught height to be used subsequently in repetitive operations by the machine. This teaching method is particularly useful for very small objects because the positive pressure does not lift the object.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: February 23, 2021
    Assignee: BPM Microsystems
    Inventors: William H. White, Alain Mangiat, Rudy DeLeon
  • Publication number: 20090287969
    Abstract: The present invention provides an apparatus and method for using a bit error rate tolerance (BERT) technique for high-speed programming of non-volatile electronic memory devices. The device programmer is comprised of an embedded computer system and specialized electronic circuitry to interface to the device to be programmed. According to one aspect of the invention, the device programmer contains digital registers to accumulate the number of incorrect data bits encountered during the verification of the device programming operation. A field-programmable input to the device programmer specifies the BERT to be allowed at precise intervals within the device. Devices that are found to exceed the specified BERT shall be rejected.
    Type: Application
    Filed: April 14, 2009
    Publication date: November 19, 2009
    Applicant: BPM Microsystems
    Inventors: Brandon L. White, Danny Tjandra