Abstract: A semiconductor device is provided with a peripheral region that has a narrow width and exhibits good electric field relaxation and high robustness against induced charges. The device has an active region for main current flow and a peripheral region surrounding the active region on a principal surface of a semiconductor substrate of a first conductivity type. The peripheral region has a guard ring of a second conductivity type composed of straight sections and curved sections connecting the straight sections formed in a region of the principal surface surrounding the active region, and a pair of polysilicon field plates in a ring shape formed separately on inner and outer circumferential sides of the guard ring. The surface of the guard ring and the pair of polysilicon field plates of the inner circumferential side and the outer circumferential side are electrically connected with a metal film in the curved section.

Abstract: A semiconductor apparatus according to aspects of the invention includes a power MOSFET including a main MOSFET and sensing MOSFET's. The main MOSFET and the sensing MOSFET's are formed on a semiconductor substrate, and a sensing MOSFET is selected for changing the sensing ratio and further for confining the sensing ratio variations within a certain narrow range stably from a low main current range to a high main current range. A semiconductor apparatus according to aspects of the invention facilitates reducing the manufacturing costs thereof, obviating the cumbersomeness caused in the use thereof, and confining the sensing ratio variations within a certain narrow range stably.

Abstract: A TMBS diode is disclosed. In an active portion and a voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of an n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device is high in withstand voltage without injection of minority carriers, and electric field intensity of a trench formed in an end portion of an active portion is relaxed.

Abstract: A digital control switching power supply unit includes an A/D converter circuit having a delay line circuit that has a delay element array whose delay time is controlled by a bias current, and that converts a current value into a digital signal using a signal transmission delay time, a phase difference detector circuit that detects a phase difference between a switching cycle and an A/D conversion cycle, a charge pump circuit that generates a control voltage in accordance with the phase difference, and a bias current indicator circuit that determines a bias current in accordance with an output voltage of the charge pump circuit and a result of a comparison of a detected value of the output voltage and a reference voltage, wherein the digital control switching power supply unit controls in such a way that the A/D conversion cycle is synchronized with the switching cycle.

Abstract: A method of producing a device includes embedding trenches with an epitaxial layer having high crystallinity while a mask oxide film remains unremoved. An n-type semiconductor is formed on the surface of a silicon substrate, and a mask oxide film and a mask nitride film are formed on the surface of the n-type semiconductor. The mask laminated film is opened by photolithography and etching, and trenches are formed in the silicon substrate. The width of the remaining mask laminated film is narrowed and portions of the n-type semiconductor close to the opening ends of the trenches are exposed. The trenches are embedded with a p-type semiconductor and the surface of the mask laminated film is prevented from being covered with the p-type semiconductor. The p-type semiconductor is grown from the second exposed portions of the n-type semiconductor. V-shaped grooves are prevented from forming on the surface of the p-type semiconductor.