Abstract: An acquisition module for acquiring signal timing in a CDMA system has a register for storing and organizing synchronization code, at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code, at least 4 absolute value blocks for determining absolute values of match filtering results, a summation function for summing results obtained through match filtering and through absolute value taking, and a control logic for controlling the acquisition process, characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing.