Abstract: For controlling a multi-stage load with pulsewidth modulation (PWM), the individual stages have normally separately applied thereto load currents which are clocked in a phase-shifted mode so as to avoid load peaks. An output stage for PWM control of a load stage with a delay circuit which, in addition to the load current modulated by a PWM input signal, supplies a PWM output signal that is delayed by a predetermined fraction of the period duration relative to the PWM input signal. The output stage can especially be realized by integrating the delay circuit together with the actual power semiconductor switch and an associated monitoring and control circuit in a single component. By cascading such output stages, a controller for phase-shifted PWM control of multi-stage loads, which is independent of a precise time base, can be realized in a simple manner.