Patents Assigned to Celadon Systems, Inc.
  • Patent number: 7768282
    Abstract: A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: August 3, 2010
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7728609
    Abstract: A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 1, 2010
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7659737
    Abstract: A probe needle apparatus and method provides a drive guard having the same potential as a probe needle for reducing signal noise in low current measurements. The probe needle apparatus includes a central conductive core covered with alternating layers of dielectric and conductive materials, a first layer of dielectric material applied to maintain electrical access to the conductive central core while providing continuous isolation of the conductive central core elsewhere, and a conductive drive guard layer applied around the first layer of dielectric material in electrical isolation from the conductive central core.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: February 9, 2010
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Publication number: 20090295416
    Abstract: A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a chassis body containing a plurality of probes for probing devices on a wafer, a dielectric block for supporting the probes, and a wireguide for guiding a plurality of cables from the testing equipment into the chassis body. A wafer station having replaceable base plates and replaceable probe tiles are also provided.
    Type: Application
    Filed: August 11, 2009
    Publication date: December 3, 2009
    Applicant: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7626404
    Abstract: A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a chassis body containing a plurality of probes for probing devices on a wafer, a dielectric block for supporting the probes, and a wireguide for guiding a plurality of cables from the testing equipment into the chassis body. A wafer station having replaceable base plates and replaceable probe tiles are also provided.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: December 1, 2009
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7545157
    Abstract: A shielded probe apparatus is provided with a shielded probe and a tri-axial cable that are electrically connected within a shielded chassis. The shielded probe apparatus is capable of electrically testing a semiconductor device at a sub 100 fA operating current and an operating temperature up to 300 C.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: June 9, 2009
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7345494
    Abstract: A tile used to hold one or more probes for testing a semiconductor wafer. The tile has one or more sites for inserting one or more probes to test the semiconductor wafer. Each site has one or more holes. Each hole is coupled with a slot forming an angle. A probe is inserted into the tile from a top of the tile through the hole and seated on the slot. The probe has a probe tip. The probe tip is in contact with the semiconductor wafer at one end of the slot at a bottom of the tile. The probe tip is aligned with an X and Y coordinates of a bond pad on the semiconductor wafer.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: March 18, 2008
    Assignee: Celadon Systems, Inc.
    Inventor: Bryan J. Root
  • Patent number: 7271607
    Abstract: A probe needle apparatus and method provides a drive guard having the same potential as a probe needle for reducing signal noise in low current measurements. The probe needle apparatus includes a conductive central core covered with alternating layers of dielectric and conductive materials, a first layer of dielectric material applied to maintain electrical access to the conductive central core while providing continuous isolation of the conductive central core elsewhere, and a conductive driven guard layer applied around the first layer of dielectric material in electrical isolation from the conductive central core.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: September 18, 2007
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7259577
    Abstract: A shielded probe apparatus is provided with a shielded probe and a tri-axial cable that are electrically connected within a shielded chassis. The shielded probe apparatus is capable of electrically testing a semiconductor device at a sub 100 fA operating current and an operating temperature up to 300 C.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: August 21, 2007
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7170305
    Abstract: A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: January 30, 2007
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 7148710
    Abstract: A tile used to hold one or more probes for testing a semiconductor wafer. The tile has one or more sites for inserting one or more probes to test the semiconductor wafer. Each site has one or more holes. Each hole is coupled with a slot forming an angle. A probe is inserted into the file from a top of the tile through the hole and seated on the slot. The probe has a probe tip. The probe fip is in contact with the semiconductor wafer at one end of the slot at a bottom of the file. The probe fip is aligned with an X and Y coordinates of a bond pad on the semiconductor wafer.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: December 12, 2006
    Assignee: Celadon Systems, Inc.
    Inventor: Bryan J. Root
  • Patent number: 6992495
    Abstract: A shielded probe apparatus is provided with a shielded probe and a tri-axial cable that are electrically connected within a shielded chassis. The shielded probe apparatus is capable of electrically testing a semiconductor device at a sub 100 fA operating current and an operating temperature up to 300 C.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: January 31, 2006
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 6975128
    Abstract: A probe needle apparatus having a conductive central core with alternating layers of dielectric and conductive materials is provided. The apparatus includes the conductive central core, a first layer of dielectric material applied to maintain electrical access to the conductive central core while providing continuous isolation of the conductive central core elsewhere, and a conductive driven guard layer applied around the first layer of dielectric material in electrical isolation from the conductive central core. The conductive driven guard layer is applied on the first layer of dielectric material with a mask on an end of the conductive central core to prevent the conductive driven guard layer from touching the conductive central core.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: December 13, 2005
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 6963207
    Abstract: A method and apparatus for terminating a probe that probes a semiconductor device with a signal cable from a tester is provided to connect layers of the probe to layers of the signal cable side by side. The probe and signal cable can be a co-axial or tri-axial probe and signal cable, respectively. A center conductive probe needle of the probe is disposed side by side with and electrically connects to a center signal conductor of the signal cable. A dielectric layer of the probe is disposed side by side with and connects to a dielectric layer of the signal cable. A conductive guard layer of the probe is disposed side by side with and electrically connects to a conductive dispersion/guard layer of the signal cable, and a sleeve of the probe is disposed side by side with and connects to a sleeve of the signal cable. In a tri-axial embodiment, a second dielectric layer of the probe is disposed side by side with and connects to a second dielectric layer of the signal cable.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: November 8, 2005
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 6882168
    Abstract: A tile used to hold one or more probes for testing a semiconductor wafer. The tile has one or more sites for inserting one or more probes to test the semiconductor wafer. Each site has one or more holes. Each hole is coupled with a slot forming an angle. A probe is inserted into the tile from a top of the tile through the hole and seated on the slot. The probe has a probe tip. The probe tip is in contact with the semiconductor wafer at one end of the slot at a bottom of the tile. The probe tip is aligned with an X and Y coordinates of a bond pad on the semiconductor wafer.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: April 19, 2005
    Assignee: Celadon Systems, Inc.
    Inventor: Bryan J. Root
  • Patent number: 6586954
    Abstract: A tile used to hold one or more probes for testing a semiconductor wafer. The tile has one or more sites for inserting one or more probes to test the semiconductor wafer. Each site has one or more holes. Each hole is coupled with a slot forming an angle. A probe is inserted into the tile from a top of the tile through the hole and seated on the slot. The probe has a probe tip. The probe tip is in contact with the semiconductor wafer at one end of the slot at a bottom of the tile. The probe tip is aligned with X and Y coordinates of a bond pad on the semiconductor wafer.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: July 1, 2003
    Assignee: Celadon Systems, Inc.
    Inventor: Bryan J. Root
  • Patent number: 6201402
    Abstract: A system and method for a plurality of probe tiles and a probe platform for electrically probing a semiconductor wafer over a broad area of the semiconductor wafer. Nine ceramic tiles are configured in a flat three by three matrix, and are held in place by a probing platform. Each tile may be moved independently in an X and Y direction. The probe platform has three control knobs on the side to move a tile in the X direction and three control knobs on the front to move a tile in the Y direction. The control knobs are attached to transmission shafts which slide back and forth into three ball detent positions. The ball detent positions determine which tile is engaged and can be manipulated. The ceramic tiles hold self-aligning tungsten probe tips to permit semiconductor wafer testing over a wide temperature range.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: March 13, 2001
    Assignee: Celadon Systems, Inc.
    Inventor: Bryan J. Root