Patents Assigned to Celestica, Inc.
  • Patent number: 7269028
    Abstract: A method of routing or laying out signal traces on printed wire or circuit board in order to improve signal transmission quality. The method includes routing a given signal trace such that it is electrically connected to a rectangular corner of a substantially wider component pin pad and forms an angle of approximately 135 degrees with the proximate sides of the pad, thereby minimizing the impedance discontinuity at the interface or junction of the signal trace and pad and hence minimizing the reflection of the digital signal at the interface or junction.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: September 11, 2007
    Assignee: Celestica, Inc.
    Inventors: Jacqueline V. Csonka, Ignatius T. Chong
  • Patent number: 5793191
    Abstract: A composite power supply comprises a master ZVS power supply and a slave ZVS power supply. Using a phase lock loop circuit, the composite power supply detects a phase relationship between switching of the first switch and switching of the second switch, and adjusts timing of switching of the second switch if the first switch and the second switch are not being switched at a predetermined phase relationship with each other. The outputs of the two power supplies are connected together. Thus, the master power supply contributes approximately half the output power and precision control on the output/load voltage while the slave power supply contributes approximately half the output power.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: August 11, 1998
    Assignee: Celestica, Inc.
    Inventors: Michael Shane Elmore, Kenneth Andrew Wallace
  • Patent number: 5760671
    Abstract: A transformer comprises a ferrite core and a printed circuit board for primary and/or secondary windings. The ferrite core comprises first and second trunk portions parallel with each other and first and second leg portions parallel with each other. The trunks and first and second leg portions are positioned into a rectangular configuration. The core also comprises a third leg portion parallel to the first and second leg portions and interposed midway between the trunk portions. A cross-sectional area of the first and second leg portions is approximately the same as each other, approximately one half the cross-sectional area of the third leg portion, less than the cross-sectional area of the first trunk portion and less than the cross-sectional area of the second trunk portion.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: June 2, 1998
    Assignee: Celestica Inc.
    Inventors: Terry Chester Lahr, Garey George Roden
  • Patent number: 5610503
    Abstract: A dc-to-dc converter circuit for generating an output voltage from a source voltage includes a plurality of first metal oxide semiconductor field effect transistors (MOSFETs) connected in parallel and collectively defining a gate, a source and a drain. A driver circuit preferably includes a bipolar transistor connected to the gate for turning on the first MOSFETs. A second MOSFET is preferably connected to the gate for turning off the plurality of first MOSFETs. The dc-to-dc converter also preferably includes a clamp circuit connected to the plurality of first MOSFETs across the drain and source thereof. Protection, soft-start and status features are also preferably incorporated into the dc-to-dc converter. A voltage divider is connected to a reference voltage for dividing a first reference voltage to thereby generate a second reference voltage less than a desired output voltage.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: March 11, 1997
    Assignee: Celestica, Inc.
    Inventors: John K. Fogg, Wayne Utter, George Dohanich