Abstract: An organic light emitting device is formed by assembling a first substrate and a second substrate. The second substrate includes several sub-pixels. The first substrate includes several transistors and, for each subpixel, a first connecting electrode. The transistors are electrically connected to each other, and the first connecting electrode is electrically connected to the respective one of the transistors. Each sub-pixel includes a light-emitting region and a non light-emitting region. A second connecting electrode is formed within the non light-emitting region and projects toward the first substrate. The first and second substrates are electrically connected via the connection of the first and second connecting electrodes.

Abstract: A method is provided. The method includes displaying a first image pixel on a first display pixel of a plurality of display pixels of a monitor, and displaying a second image pixel following the first image pixel on a portion of sub-pixels of the first display pixel and a portion of sub-pixels of a second display pixel so as to avoid loss of image data when displaying the image pixels on a monitor of a small resolution.

Abstract: A flat panel display, a display driving apparatus thereof and a shift register thereof are disclosed. The shift register is adapted for driving a flat panel display. The shift register receives an input signal and a clock signal. The shift register includes a delay unit and a buffer unit. The delay unit is used to delay the input signal for a half period of the clock signal and then output the delayed input signal. The buffer unit receives the delayed input signal, and provides an extra driving power accordingly. The buffer unit is operated by a fixed first voltage and a fixed second voltage.

Abstract: A display having voltage-driven organic light-emitting pixel circuits. Each pixel circuit includes an organic light-emitting diode, a data writing circuit, a capacitor, three transistors, and a switch. The pixel circuit can compensate the threshold voltage variations of low temperature poly silicon thin film transistors. This increases the stability of the voltage-driven organic light-emitting pixel circuits, improves the uniformity of the luminance of the display, and provides a larger aperture ratio for the pixels.

Abstract: A shift register circuit has a plurality of shift registers connected in series, each shift register having a phase-shifting element and a pull-high element, wherein the phase-shifting element receives a first input signal, a first clock signal and a second clock signal, and the first clock signal and the second clock signal are complementary in phase. The pull-high element is used for pulling up an output signal to a high logic level, and includes a logic unit, wherein no current path is established in the pull-high element when the shift register is operated in any type of periods.

Abstract: A logic circuit includes a logic unit, a driving unit, and a voltage level adjuster. The logic unit includes an output node having a logic state, the logic unit being coupled to a first voltage reference. The driving unit includes an input node, the driving unit being coupled to a second voltage reference, the driving unit and the first logic unit being constructed from a single type of transistor. The voltage level adjuster provides a control signal that causes the driving unit to reduce a current flowing through the driving unit when the output node of the first logic unit has a first logic state, and causes the driving unit to drive an output node of the logic circuit to a voltage level substantially equal to that of the second voltage reference when the output node of the first logic unit has a second logic state.

Abstract: A shift register includes a control unit, a signal switching unit and a buffer unit. The control unit determines whether to transfer an input signal from a first input terminal to a first output terminal according to a first control signal, and determines whether to conduct a first pre-defined voltage to a second output terminal according to a second control signal. The signal switching unit uses the signal output from the first output terminal as one of the considerations for determining whether to conduct a second pre-defined voltage to a third output terminal, and uses the second control signal as one of the considerations for determining whether to conduct the second pre-defined voltage to the first output terminal. The buffer unit outputs signal according to the signals from the first/third output terminals. Further, at least once, the second control signal is enabled after the first control signal has been enabled.

Abstract: A logic circuit includes a logic unit, a driving unit, and a voltage level adjuster. The logic unit includes an output node having a logic state, the logic unit being coupled to a first voltage reference. The driving unit includes an input node, the driving unit being coupled to a second voltage reference, the driving unit and the first logic unit being constructed from a single type of transistor. The voltage level adjuster provides a control signal that causes the driving unit to reduce a current flowing through the driving unit when the output node of the first logic unit has a first logic state, and causes the driving unit to drive an output node of the logic circuit to a voltage level substantially equal to that of the second voltage reference when the output node of the first logic unit has a second logic state.

Abstract: A bidirectional shift register includes a former stage multiplexer, a latter stage multiplexer, a former stage full-swing shift register, and a latter stage full-swing shift register, all of which have a plurality of registers all of the same type. The former and the latter stage multiplexers output signals according to a forward clock, a backward clock, a forward control signal, and a backward control signal. The former and the latter stage full-swing shift register store the signals output from the former and the latter stage full-swing shift registers respectively.

Abstract: A shift register circuit has a plurality of shift registers connected in series, each shift register having a phase-shifting element and a pull-high element, wherein the phase-shifting element receives a first input signal, a first clock signal and a second clock signal, and the first clock signal and the second clock signal are complementary in phase. The pull-high element is used for pulling up an output signal to a high logic level, and includes a logic unit, wherein no current path is established in the pull-high element when the shift register is operated in any type of periods.

Abstract: An organic light emitting device is formed by assembling a first substrate and a second substrate. The second substrate includes several sub-pixels. The first substrate includes several transistors and, for each subpixel, a first connecting electrode. The transistors are electrically connected to each other, and the first connecting electrode is electrically connected to the respective one of the transistors. Each sub-pixel includes a light-emitting region and a non light-emitting region. A second connecting electrode is formed within the non light-emitting region and projects toward the first substrate. The first and second substrates are electrically connected via the connection of the first and second connecting electrodes.

Abstract: An organic light emitting device (OLED) is formed by assembling a first substrate and a second substrate. The second substrate includes several sub-pixels. The first substrate includes several transistors electrically connected to each other and, for each subpixel, a first connecting electrode electrically connected to one of the transistors. Each subpixel includes a light-emitting region and a non light-emitting region. A second connecting electrode is formed in the non light-emitting region and electrically connected to the respective first connecting electrode.

Abstract: An organic light emitting diode circuit of an organic light emitting display with voltage compensation technique includes a first capacitor, a first TFT, a second TFT, a third TFT, a reset circuit and an OLED. The first TFT has a first terminal for receiving a first voltage, and a second terminal coupled to its gate and a first end of the first capacitor. The second TFT has a first terminal for receiving a second reference voltage and a gate coupled to the gate of the first TFT. The third TFT is coupled to the first capacitor and receives a pixel voltage and scan signal. The reset circuit sets the first end of the first capacitor to have a first voltage level. The OLED has an anode coupled to a second terminal of the second TFT and a cathode for receiving a third reference voltage. The first voltage level is smaller than a voltage level of the first reference voltage.