Abstract: A semiconductor structure, a semiconductor assembly and a power semiconductor device. The semiconductor structure includes: a P-type semiconductor material layer; an N-type semiconductor material layer adjacent to the P-type semiconductor material layer, wherein the N-type semiconductor material layer and the P-type semiconductor material layer together from a PN junction; and a plurality of insulating material layers located outside the PN junction and distributed along the superposition direction of the P-type semiconductor material layer and the N-type semiconductor material layer, wherein the relative dielectric constants of the adjacent insulating material layers are different.

Abstract: A high-frequency absorption diode chip and a making method. The chip comprises a substrate; an epitaxial layer; a base region window; the base region window comprises a pressure point region and a partial pressure region; the epitaxial layer separates the pressure point region from the partial pressure region; a first ion diffusion layer is formed on the base region window; an emitting region window is provided on the first ion diffusion layer; a second ion diffusion layer is formed on the emitting region window; the upper surfaces of the first ion diffusion layer and the second ion diffusion layer in the pressure point region both are provided with a passivation layer; the upper surface of the first ion diffusion layer in the partial pressure region is provided with an oxide layer; both the oxide layer and the passivation layer extend to the upper surface of the epitaxial layer.

Abstract: A semiconductor structure, a semiconductor assembly and a power semiconductor device. The semiconductor structure includes: a P-type semiconductor material layer; an N-type semiconductor material layer adjacent to the P-type semiconductor material layer, wherein the N-type semiconductor material layer and the P-type semiconductor material layer together from a PN junction; and a plurality of insulating material layers located outside the PN junction and distributed along the superposition direction of the P-type semiconductor material layer and the N-type semiconductor material layer, wherein the relative dielectric constants of the adjacent insulating material layers are different.

Abstract: A process of manufacture of high voltage (300-600V) and high current (10-100 A) Schottky diode, which includes the following steps in sequence: provide a N-type silicon wafer; process phosphor deposition and high-concentration N+ phosphorus diffusion; cutting and chemical mechanical polishing; classifying into different voltage groups; processing primary oxidation and lithography; processing boron diffusion, secondary lithography and wiring; process ion implantation and metal spluttering to form the Schottky barrier; process metal evaporation and lithography for front metal; and finally process etching and metal evaporation for rear metal. Instead of the conventional epitaxial process, a diffusion process is employed to form the N+ layer. The final product is equipped with the advantages of Schottky diode and is applicable for high voltage of 300-600V and high current of 10-100 A. The current leakage and defect rate are dramatically lowered while the cost is lowered, thus mass production is facilitated.