Abstract: A tool for micro-soldering the connecting tags of an integrated circuit chip to corresponding terminals on a substrate by Joule heating includes a high conductivity bit having a planar bottom face adapted to contact the tags and press them against the terminals while applying sufficient heat to the tags to solder them to the terminals. The face has a perimeter and a centrally apertured portion adapted to receive and accommodate the circuit chip. The apertured portion forms a geometric loop on the planar face having opposite sides spaced from each other and adapted to contact the tags of the chip. A continuous high electrical conductivity flange extends upwardly from all portions of the perimeter of the face to provide rigidity to the bit.A pair of high conductivity strips extend from facing segments of the flange for applying current to and removing current from the flange on opposite sides of the loop so that a pair of symmetrical current half loops extend about the face between the opposite sides thereof.
Type:
Grant
Filed:
April 12, 1978
Date of Patent:
March 10, 1981
Assignee:
Compagnie Internationale l'Informatique-CUU Honeywell Bull