Patents Assigned to Crossfield Technology LLC
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Patent number: 9317478Abstract: A fused floating-point add-subtract unit includes far path logic, close path logic, and selection logic. The far path logic is configured to perform addition and subtraction operations on first and second significands of first and second operands, respectively, to produce a far path sum and a far path difference. The close path logic is configured to perform addition and subtraction operations on the first and second significands of the first and second operands, substantially concurrently with the addition and subtraction operations of the far path logic, to produce a close path sum and a close path difference. The selection logic selectively provides one of the far path sum and the close path sum as a significand of a sum output and one of the far path difference and the close path difference as a significand of a difference output.Type: GrantFiled: September 10, 2012Date of Patent: April 19, 2016Assignee: Crossfield Technology LLCInventors: Earl E. Swartzlander, Jr., Jongwook Sohn
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Patent number: 9077534Abstract: A circuit includes a linear quadratic estimator (LQE) configured to receive a plurality of measurements a signal. The LQE is configured to weight the measurements based on their respective uncertainties to produce weighted averages. The circuit further includes a controller coupled to the LQE and configured to selectively adjust at least one data link parameter associated with a communication channel in response to receiving the weighted averages.Type: GrantFiled: June 20, 2013Date of Patent: July 7, 2015Assignee: Crossfield Technology, LLCInventor: Dennis D. Ferguson
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Publication number: 20140380131Abstract: A circuit includes a linear quadratic estimator (LQE) configured to receive a plurality of measurements a signal. The LQE is configured to weight the measurements based on their respective uncertainties to produce weighted averages. The circuit further includes a controller coupled to the LQE and configured to selectively adjust at least one data link parameter associated with a communication channel in response to receiving the weighted averages.Type: ApplicationFiled: June 20, 2013Publication date: December 25, 2014Applicant: CROSSFIELD TECHNOLOGY LLCInventor: Dennis D. Ferguson
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Publication number: 20140074903Abstract: A fused floating-point add-subtract unit includes far path logic, close path logic, and selection logic. The far path logic is configured to perform addition and subtraction operations on first and second significands of first and second operands, respectively, to produce a far path sum and a far path difference. The close path logic is configured to perform addition and subtraction operations on the first and second significands of the first and second operands, substantially concurrently with the addition and subtraction operations of the far path logic, to produce a close path sum and a close path difference. The selection logic selectively provides one of the far path sum and the close path sum as a significand of a sum output and one of the far path difference and the close path difference as a significand of a difference output.Type: ApplicationFiled: September 10, 2012Publication date: March 13, 2014Applicant: CROSSFIELD TECHNOLOGY LLCInventors: Earl E. Swartzlander, JR., Jongwook Sohn
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Patent number: 8190699Abstract: In a particular embodiment, a multi-path bridge circuit includes a backplane input/output (I/O) interface to couple to a local backplane having at least one communication path to a processing node and includes at least one host interface adapted to couple to a corresponding at least one processor. The multi-path bridge circuit further includes logic adapted to identify two or more communication paths through the backplane interface to a destination memory, to divide a data block stored at a source memory into data block portions, and to transfer the data block portions in parallel from the source memory to the destination node via the identified two or more communication paths.Type: GrantFiled: July 28, 2008Date of Patent: May 29, 2012Assignee: Crossfield Technology LLCInventors: Brett McMillian, Gary McMillian, Dennis Ferguson
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Patent number: 8166091Abstract: In an embodiment, a dot-product unit to perform single-precision floating-point product and addition operations is disclosed that includes a first multiplier tree unit adapted to multiply first and second significand operands to produce a first set of two partial products. The dot-product unit further includes a second multiplier tree unit adapted to multiply third and fourth significand operands to produce a second set of two partial products, a shared exponent compare unit adapted to compare exponents of the first, second, third and fourth operands to produce an alignment shift value, and an alignment unit adapted to shift the second set of two partial products based on the alignment shift value. The dot-product unit also includes an adder unit adapted to add or subtract the first set of two partial products and the second shifted set of two partial products to produce a dot-product value that is a single-precision floating-point value.Type: GrantFiled: November 10, 2008Date of Patent: April 24, 2012Assignee: Crossfield Technology LLCInventors: Earl Swartzlander, Jr., Hani Saleh
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Patent number: 8161090Abstract: In a particular embodiment, a method is disclosed that includes receiving first and second operands at a floating-point fused add-subtract circuit. The method further includes simultaneously performing add and subtract operations on the first and second operands via the floating-point fused add-subtract circuit to produce a sum result output and a difference result output. The floating-point fused add-subtract circuit includes sign logic, exponent adjustment logic, and shift logic that are shared by an add/round and post-normalize circuit and a subtract/round and post-normalize circuit to produce the sum and difference result outputs.Type: GrantFiled: December 5, 2008Date of Patent: April 17, 2012Assignee: Crossfield Technology LLCInventors: Earl Swartzlander, Jr., Jordan Hani Saleh
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Publication number: 20100146022Abstract: In a particular embodiment, a method is disclosed that includes receiving first and second operands at a floating-point fused add-subtract circuit. The method further includes simultaneously performing add and subtract operations on the first and second operands via the floating-point fused add-subtract circuit to produce a sum result output and a difference result output. The floating-point fused add-subtract circuit includes sign logic, exponent adjustment logic, and shift logic that are shared by an add/round and post-normalize circuit and a subtract/round and post-normalize circuit to produce the sum and difference result outputs.Type: ApplicationFiled: December 5, 2008Publication date: June 10, 2010Applicant: Crossfield Technology LLCInventors: Earl E. Swartzlander, JR., Hani H. Saleh
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Publication number: 20100121898Abstract: In an embodiment, a dot-product unit to perform single-precision floating-point product and addition operations is disclosed that includes a first multiplier tree unit adapted to multiply first and second significand operands to produce a first set of two partial products. The dot-product unit further includes a second multiplier tree unit adapted to multiply third and fourth significand operands to produce a second set of two partial products, a shared exponent compare unit adapted to compare exponents of the first, second, third and fourth operands to produce an alignment shift value, and an alignment unit adapted to shift the second set of two partial products based on the alignment shift value. The dot-product unit also includes an adder unit adapted to add or subtract the first set of two partial products and the second shifted set of two partial products to produce a dot-product value that is a single-precision floating-point value.Type: ApplicationFiled: November 10, 2008Publication date: May 13, 2010Applicant: Crossfield Technology LLCInventors: Earl E. Swartzlander, JR., Hani H. Saleh
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Publication number: 20100023595Abstract: In a particular embodiment, a multi-path bridge circuit includes a backplane input/output (I/O) interface to couple to a local backplane having at least one communication path to a processing node and includes at least one host interface adapted to couple to a corresponding at least one processor. The multi-path bridge circuit further includes logic adapted to identify two or more communication paths through the backplane interface to a destination memory, to divide a data block stored at a source memory into data block portions, and to transfer the data block portions in parallel from the source memory to the destination node via the identified two or more communication paths.Type: ApplicationFiled: July 28, 2008Publication date: January 28, 2010Applicant: Crossfield Technology LLCInventors: Brett McMillian, Gary McMillian, Dennis Ferguson