Patents Assigned to CrossFire Technologies, Inc.
  • Patent number: 9837129
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: December 5, 2017
    Assignee: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Patent number: 9449952
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: September 20, 2016
    Assignee: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Patent number: 8958227
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: February 17, 2015
    Assignee: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Publication number: 20140151752
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Application
    Filed: October 22, 2013
    Publication date: June 5, 2014
    Applicant: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Patent number: 8569879
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and (programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Grant
    Filed: January 16, 2012
    Date of Patent: October 29, 2013
    Assignee: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Publication number: 20120112245
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and (programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Application
    Filed: January 16, 2012
    Publication date: May 10, 2012
    Applicant: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Patent number: 8097526
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: January 17, 2012
    Assignee: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler
  • Publication number: 20100140784
    Abstract: Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools.
    Type: Application
    Filed: November 4, 2009
    Publication date: June 10, 2010
    Applicant: CrossFire Technologies, Inc.
    Inventors: Kevin Atkinson, Clifford H. Boler