Abstract: A prealigner for semiconductor wafers is described, together with a method for prealigning. The prealigner includes mechanism for holding the wafer in a non-slip manner and motive means for adjusting the position of its engagement with the wafer as necessary to make the geometric center of the wafer precisely coincident with a chose position. The alignment method results in eliminating parts of original equations during the calculations of the location of the geometric center and flats or other distinguishing features on the edge of the wafer are located by utilizing a particular equation for a plurality of overlapping sections of the edge.