Abstract: A scanning operation is performed to measure a first capacitance of a first sensor arrangement located proximate a capacitive sensor that corresponds to a function of a device. In response to the first capacitance not exceeding a first threshold, the scanning operation measures a second capacitance of the capacitive sensor to create an output used to control the function of the device. In response to the first capacitance exceeding the first threshold, operation of the scanning operation is modified to skip measuring of the second capacitance or to refrain from transmitting the output to a host of the device for controlling the function.

Abstract: A method can include in a first phase of a sensing operation, controlling at least a first switch to energize a sensor inductance; in a second phase of the sensing operation that follows the first phase, controlling at least a second switch to couple the sensor inductance to a first modulator capacitance to induce a first fly-back current from the sensor inductance, the first fly-back current generating a first modulator voltage at the first modulator capacitance, and in response to the first modulator voltage, controlling at least a third switch to generate a balance current that flows in an opposite direction to the fly-back current at the first modulator node. The first and second phases can be repeated to generate a first modulator voltage at the first modulator capacitance. the modulator voltage can be converted into a digital value representing the sensor inductance. Related devices and systems are also disclosed.

Abstract: An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.

Abstract: A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.

Abstract: Apparatuses and methods of multi-phase scanning of a touch panel are described. One apparatus selects a sequence having a number of one values, negative one values, and zero values. The one values correspond to an in-phase drive signal, the negative one values correspond to an opposite-phase drive signal, and the zero values correspond to a reference signal (e.g., reference voltage or ground). A sum of the sequence is equal to zero. The apparatus applies one of the in-phase drive signal, the opposite-phase drive signal, or the reference signal to each of a first set of electrodes at a first stage according to the sequence. The apparatus rotates the sequence to obtain a rotated sequence and applies one of the signals according to the rotated sequence. The apparatus receives sense signals to detect a presence of an object on the touch panel.

Abstract: Systems, methods, and devices improve the sensitivity of capacitive sensors. Devices may include an attenuator configured to receive an input from at least one sense electrode of a capacitive sensing device. The attenuator may be included in a sensing channel of a capacitive sensor. Devices may further include a signal generator coupled to an input of the attenuator. The signal generator may include one or more processors configured to generate a sinusoidal signal based, at least in part, on one or more noise characteristics of a scan sequence associated with one or more transmit electrodes of the capacitive sensing device, and provide the sinusoidal signal to the input of the attenuator.

Abstract: A system and method for centrally logging and aggregating miscompares on chip during a memory test. The method includes performing, by a built-in self-test (BIST) unit of a memory device, a memory test on one or more memory banks of the memory device using a first algorithm. The method includes generating miscompare results responsive to performing the memory test on the one or more memory banks of the memory device. The method includes determining failure diagnostic information based on the miscompare results. The method includes generating an error packet comprising the failure diagnostic information and the miscompare results. The method includes placing the error packet in a queue of a plurality of error packets to generate a queued error packet.

Abstract: Systems, methods, and devices implement enhanced coexistence of radios within wireless devices. Methods include receiving a data packet at a wireless device, the data packet having a packet structure, the wireless device comprising a first wireless radio collocated with a second wireless radio, and identifying one or more features of the data packet based, at least in part, on the packet structure of the data packet. Methods further include updating a medium access grant signal associated with the second wireless radio based, at least in part, on the one or more features of the data packet, the medium access grant signal determining which of the first or second wireless radios has access to a communications medium.

Abstract: A time-to-digital converter (TDC) circuit includes phase error calculation circuitry to: determine phase error values based on a time difference between a input reference clock and a feedback clock of a digital phase-locked loop (DPLL) circuit, the input reference clock and the feedback clock being unsynchronized; and provide the phase error values to a digital loop filter (DLF) of the DPLL circuit. The TDC circuit further includes clock generation circuitry to: generate a filter clock that asserts a clock pulse in response to detecting each last-received pulse of the input reference clock and the feedback clock; and provide the filter clock to the DLF concurrently with providing the phase error values to the DLF that are synchronized to the filter clock.

Abstract: A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor (HVFET) gate to be formed in the peripheral region. A high energy implant is performed to form at least one lightly doped region in a source or drain region in the substrate adjacent to the HVFET gate. The HE film is then removed, and a low voltage (LV) logic FET formed on the substrate in the peripheral region. In one embodiment, the LV logic FET is a high-k metal-gate logic FET.

Abstract: A system includes a first USB Type-C Power Delivery (USB-C/PD) port and a control circuit operatively coupled to the first USB-C/PD port. The control circuit is configured to determine whether a short circuit condition has occurred based on a first threshold voltage. The control circuit is also configured to turn off a ground isolation switch when short circuit condition occurs. The control circuit is further configured to determine a whether a voltage on a ground line is less than a second threshold voltage. The control circuit is further configured to turn on the ground isolation switch when the voltage on the ground line is less than the second threshold voltage. The control circuit may perform one or more error recovery operations after turning on the ground isolation switch.

Abstract: Implementations disclosed describe systems and methods that include establishing, by a wireless device, a communication link with a wireless access point (AP) device over an operating channel, the wireless AP device providing a single-band access within a first frequency band; time-multiplexing, by the wireless device, transmitting beacons or probes within a second frequency band with communicating with the wireless AP device over the operating channel within the first frequency band; and configuring the beacons or probes to advertise, to other wireless devices in the second frequency band, availability of connection to the wireless AP device over the operating channel within the first frequency band.

Abstract: Apparatuses and methods of shielding for capacitance-to-digital code conversion are described. One apparatus includes a capacitance-to-digital converter (CDC) for measuring a self-capacitance of a sensor electrode. The capacitance-to-digital code converter can in a first phase, apply a supply voltage to the sensor electrode. The sensor electrode and a shield electrode, the form a mutual capacitance with the sensor electrode. The CDC, in a second phase, couples the shield electrode to a ground potential and the sensor electrode to a first modulation capacitor. The first modulation capacitor is pre-charged to a reference voltage. The CDC, in a third phase, couples the sensor electrode and the shield electrode to the ground potential. The CDC, in a fourth phase, couples the shield electrode to the ground potential and the sensor electrode to a second modulation capacitor. The second modulation capacitor is pre-charged to the reference voltage.

Abstract: Controlling power factor correction (PFC) in a secondary-controlled alternating current (AC) to direct current (DC) (AC-DC) power adapter is described. In one embodiment, an apparatus includes a transformer, a primary-side controller coupled to the transformer, a PFC component coupled to the primary-side controller, and a secondary-side controller coupled to the transformer. The secondary-side controller is configured at least to obtain data informative of an amount of power, and control, based on the amount of power, a PFC operating mode of the PFC component.

Abstract: Example systems and methods of a wireless device use a signal attribute detector to determine a signal attribute value associated with a first frame received via a first antenna. Media access control (MAC) logic can detect that the first frame indicates an acknowledgement (ACK) of a second frame transmitted by the wireless device. Responsive to the detection of the ACK by the MAC logic, an antenna evaluator uses the signal attribute value to select one of the first antenna and the second antenna to transmit or receive a third frame.

Abstract: Systems, methods, and devices select antennas to enhance the range and throughput of wireless communications devices. Methods include identifying a plurality of combinations of antennas based on a plurality of available antennas for a wireless communications device, and generating, using a processing device included in a multiple-input-multiple-output (MIMO) device, a plurality of quality metrics including at least one quality metric for each of the identified combinations of antennas, where each of the at least one quality metrics represents a signal quality of a signal associated with each of the plurality of antennas, and wherein the signal is a spatial stream. Methods further include selecting at least two antennas from the plurality of combinations of antennas based, at least in part, on the plurality of quality metrics, where the at least two antennas are selected for use by the wireless communications device during a transmitting or receiving operation.

Abstract: A primary-side-controlled fly-back converter is provided to eliminate cross-conduction between a power-switch (PS) on a primary side and a synchronous-rectifier (SR) on a secondary side when operating in continuous conduction mode (CCM). Generally, the converter includes a transformer having a primary coupled to a rectified AC input through the PS, and a secondary coupled to a DC output through the SR, the SR having a drain coupled to the secondary winding. A fly-back-controller includes a primary-controller operable to control a duty cycle of the PS, and a secondary-controller operable to turn OFF the SR when the PS turns ON in CCM. The secondary-controller includes a CCM zero-crossing-detector comparator having a first input coupled to the drain of the SR through a capacitor, and is operable to detect a sharp change in a drain voltage when the PS turns ON during CCM, and to output a signal to turn OFF the SR.

Abstract: Techniques described here introduce signature frequency modulation to unmodulated pulse signals as frequency chirps to enhance the security of multi-carrier phase-based ranging signals. The characteristics of the chirps may be mutually known by an initiator and a desired reflector of the ranging applications. The characteristics of the chirps may vary between the multi-carrier signals to thwart any attempt by an eavesdropper to predict the chirps. In one aspect, the characteristics of the chirps may be calculated for each timeslot of a ranging cycle by two authorized devices using a ciphering algorithm such as the Advanced Encryption Standard (AES) based on a shared security key. Each call of the AES may generate one or more pseudo-random numbers based on the shared security key and a time-varying initialization vector that increments every timeslot. Fields of the pseudo-random number may be extracted to determine the characteristics of the chirps associated with the timeslot.

Abstract: Controlling an active clamp field effect transistor (FET) and a primary-side FET in a secondary-controlled active clamp converter is described. In one embodiment, an apparatus includes a primary-side FET coupled to a transformer and an active clamp FET disposed on a primary side of the transformer. A secondary-side controller is configured to control the active clamp FET and the primary-side FET across a same galvanic isolation barrier.

Abstract: A method can include, in an access point (AP) configured to control data transfers for associated stations (STAs) in time intervals, storing a unique identifier and quality-of-service (QoS) requirement for each STA of a first set in a nonvolatile memory of the AP. In response to a STA associating with the AP, if the associating STA is in the first set, allocating time for the STA in the time intervals to meet the QoS requirement of the STA without receiving transmitted QoS data from the STA, and if the associating STA is not in the first set, establishing a QoS for the STA having a lower priority than any associated STAs of the first set. Corresponding systems and devices are also disclosed.