Patents Assigned to Dallas Semiconductor Corporation
  • Patent number: 6058467
    Abstract: An 8051 instruction set compatible microcontroller utilizing four or less clock cycles per machine cycle. The microcontroller is designed utilizing standard hardware design language techniques (HDL) and standardized cells. The microcontroller uses both a standard 8051 style special function register and a duplicate register to perform instructions requiring indirect memory accessing.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: May 2, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: David Broxterman, Stephen D. Sandelin
  • Patent number: 6036101
    Abstract: Coin-shaped one-wire communication modules with a flange for mounting convenience may be attached to contact extensions on items such as work totes for ease of communication.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: March 14, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Steven N. Hass, Michael L. Bolan
  • Patent number: 6038655
    Abstract: A microprocessor on-board RAM provides both the usual random access by addressing and a subset of memory cells with their contents continually available on a secondary bus paralleling the data bus. This secondary bus may be used for register indirect addressing without a separate register read when the RAM subset includes the registers for register indirect addressing. The processor also has a two stage output driver for limiting maximum output current and feedback-controlled clock period partitioning.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: March 14, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell L. Little, Stephen N. Grider, Joseph Wayne Triece
  • Patent number: 6035382
    Abstract: An integrated circuit with a secure memory location is comprised of a memory and a circuit which receives a twenty-four bit command word. At least one location in the memory stores at least one secure subkey. The circuit responds to the command word with an access to a secure memory location if and only if the command word specifies a starting address of a secure subkey and the command word is transmitted in both true and bit complimented form. Each subkey is made up of a 64-bit ID field, a 64-bit password field and a 384 bit secured data field.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: March 7, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Scott J. Curry
  • Patent number: 6028166
    Abstract: A method and apparatus for generating mixed and degassed resin. Resin is added to, and stored in, a feed tank where air is forced into the resin from the bottom of the tank to mix the resin. The resin is drawn into a hold tank through a feed-to-hold tank tube by creating a vacuum within the hold tank. Resin flows out of the tube and onto a rotating plate located within the hold tank. The rotating plate provides a surface area for degassing the resin and further directs the resin to an inner surface of the hold tank which provides additional surface area for degassing the resin. A hold tank proximity sensor detects when the hold tank is full of resin and the vacuum is terminated. A low level proximity sensor detects the absence of resin in a dispense tank and a crossover valve is opened, air pressure is applied to the hold tank and resin is forced from the hold tank and into the dispense tank via a hold-to-dispense tank tube.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: February 22, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventor: Joseph Martin Guillot, Jr.
  • Patent number: 6020634
    Abstract: The replaceable power module includes a power section positioned between a cover and a frame. The cover is provided with clips to permit the attachment and detachment of the cover to the base as well the attachment and detachment of the power module to a surface mounted integrated circuit. The frame is provided with an opening for receiving the integrated circuit, and electrical contacts for electrically connecting the power module to the leads of an integrated circuit. The power section is electrically coupled to the frame and includes a battery and a crystal oscillator for controlling the integrated circuit.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Mark A. Gerber, Michael K. Strittmatter, Neil McLellan, Joseph P. Hundt
  • Patent number: 6021046
    Abstract: A thermal protection system that comprises an assembly of at least one electrical component and a heat shield surrounding the electrical component, wherein the heat shield forms a pocket between the electrical element and the heat shield and associated methods. The electrical element has at least one electrical lead. The system permits the electrical lead(s) to increase in temperature sufficient to permit soldering of the electrical lead(s) to a second electrical element. The thermal protection system also comprises a heat sink to protect the electrical element, which comprises a heat capacity material. The system also comprises electrical lead(s) with a low-cross sectional area.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Neil McLellan, Mike Strittmatter
  • Patent number: 6021494
    Abstract: This invention relates to a small portable microprocessor based circuit (electronic module) that contains information about the user of the circuit that is known or inherently known by the user. The circuit is small enough to fit inside a thickened U.S. nickel and enables a user to perform secure transactions such as money transfers, information transfers, access control, etc. The electronic module is designed to be extremely secure both physically and electronically. Furthermore, the electronic module is useless to a person other than the designated user.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Michael L. Bolan, Nicholas Fekete
  • Patent number: 6018228
    Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: January 25, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Donald R. Dias, Robert D. Lee
  • Patent number: 6014051
    Abstract: A circuit, for incorporation into an electrical system, for providing a clock signal frequency to other circuitry such as a microprocessor and/or co-processor circuitry. The clock signal frequency varies its speed depending on the available voltage and current from a host power source. The circuit maximizes clock frequency by lowering the available voltage and increasing the available supply current. The circuit can therefore provide a higher clock speed and more current for switching transistors.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: January 11, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventor: Wendell L. Little
  • Patent number: 6011417
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: January 4, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 5998858
    Abstract: A secure electronic data module containing a monolithic semiconductor chip of the type having a memory that is protected by a combination of hardware and software mechanisms such that unauthorized access to the data stored in the memory is prevented. The monolithic semiconductor chip comprises a plurality of solder bumps for attaching the chip to a substrate that may be a printed circuit board or another chip; a multi-level interlaced power and ground lines using minimum geometries; and a detection circuit block for detecting an external trip signal that may be produced by a pre-specified change in an operating condition brought on by unauthorized accessing, or an internal trip signal that may be produced by shorting of power and ground lines or by a change in an oscillator's frequency, also associated with or appurtenant to unauthorized accessing of the secure memory.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: December 7, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell L. Little, Stephen M. Curry, Steven N. Grider, Mark L. Thrower, Steven N. Hass, Michael L. Bolan, Ricky D. Fieseler, Bradley M. Harrington
  • Patent number: 5994970
    Abstract: A temperature compensated crystal oscillation circuit adapted to be contained within a small device package and providing an output frequency accuracy of approximately +/-2 ppm over a temperature range or less than 2 minutes per year over the temperature range. The device includes a crystal and a single integrated circuit wherein the integrated circuit has a temperature sensing circuit with a digital output, control circuitry, a memory circuit and a switched capacitor array for compensating the oscillation of the crystal oscillator over temperature.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Douglas Gene Cole, Ranganath Bagade, Titkwan Hui
  • Patent number: 5994770
    Abstract: An apparatus includes a circuit positioned in a housing, which circuit includes an input/output module having a parasitic power sub-module. The circuit further includes a scratchpad memory, coupled to the input/output module; a programmable memory, coupled to the scratchpad memory; and a control module, coupled to the input/output module, the scratchpad memory and the programmable memory. In certain variations, the input/output module further includes at least one of a one-wire bus and a three-wire bus in addition to a bus arbitrator.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Bradley M. Harrington, Hal Kurkowski, James P. Cusey
  • Patent number: 5994967
    Abstract: An integrated, crystalless oscillator includes a voltage controlled oscillator circuit for generating an output signal, and a frequency-locked feedback network to stabilize the frequency of the output signal. The frequency-locked feedback network includes a divide-down circuit and a frequency-controlled variable resistor, the divide-down circuit divides down the frequency of the output signal to produce a feedback frequency which is used to control the frequency-controlled variable resistor. The control voltage for the voltage controlled oscillator circuit is derived from the voltages across a fixed resistor and the frequency-controlled variable resistor. The voltages across these resistors drive an amplifier, with the output of the amplifier being the control voltage for the voltage controlled oscillator circuit.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Cong Dinh Nguyen
  • Patent number: 5991887
    Abstract: An initializer that responds to change in a power supply potential level, for generating an initialize signal to initialize a circuit to a select state, the initializer includes a power-on reset circuit that switches between an active and a powered-down state, and is for generating the initialize signal. The initializer also includes a wake-up circuit that monitors the power supply potential level and switches the power-on reset circuit from the powered-down state to the active state when selected change in the power supply potential level occurs.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: November 23, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Richard William Ezell
  • Patent number: 5982202
    Abstract: A method and apparatus for pre-biasing a sensing amplifier. A sense amp bias transistor connects a first latching transistor and a second latching transistor to ground while the sense amplifier is being precharged. The connection of the first latching transistor and the second latching transistor to ground through the sense amp bias transistor discharges any additional charge which may have built up on the inputs of the first latching transistor and the second latching transistor as a result of a Vbump condition. The sense amp bias transistor is enabled concurrently with the precharging of the sense amplifier. The sense amp bias transistor can be enabled by a controller, or alternatively, enablement is effectuated by inverting the signal which precharges the sense amplifier.
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: November 9, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Marvin L. Peak, Jr.
  • Patent number: 5982241
    Abstract: A monolithic oscillator having dual programmable fixed frequency outputs includes crystal-less oscillator circuitry utilizing frequency-locked feedback to generate ai signal having a select frequency, the frequency being stabilized over temperature and voltage by compensation circuitry associated with the crystal-less oscillator circuitry. A programmable prescaler is coupled to the crystal-less oscillator circuitry for varying the frequency of the signal generated by the crystal-less oscillator circuitry by a select amount. The monolithic oscillator further includes inputs for receiving an external signal, such as an external reference signal, or for connection to a crystal for providing an alternative frequency reference. A multiplexer is used to select either the external signal (or crystal) or the signal from the crystal-less oscillator circuitry to be used for the output signal.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: November 9, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Cong Dinh Nguyen, Stephen Christopher Brightman
  • Patent number: 5978927
    Abstract: In a data bus environment where a host device and a plurality of other devices are connected to the bus, the time required for the first and the last device to respond to a host request is measured. Once the time required between the first and the last response is known, then a read/write window time can be minimized thereby increasing the speed of communication over the data bus.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: November 2, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Wendell L. Little, David A. Bunsey, Jr.
  • Patent number: 5974504
    Abstract: A secured metal token using a single wire communication system is employed to dispense units of value and to provide a secure storage device for controlling the dispensing of articles or service items. The metal token can be formed of two pieces with a simplified electronic circuit inside which can contain units of value for the dispensing of items using the memory within the metal token as a secure vault. The token uses a simple two wire (ground and combined clock/data) arrangment. As goods are purchased or services rendered the value of those good or services is deducted from a prestored amount within the token.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: October 26, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Peirling