Abstract: A nonvolatile memory has a linear array of memory cells to serially store counts by setting the cells one by one in correspondence with input pulses and when the array is full by resetting the cells one by one for successive pulses. When all the cells are reset a conventional binary counter is incremented and the serial count is repeated for further inputs. This procedure minimizes the erase/write sequences required to count a series of pulses. A shift register having a stage corresponding to each memory cell is used to read out the data from the linear array. Data is loaded from the array into the shift register and shifted out in a serial pulse train to a binary counter.