Patents Assigned to Deltec Electronics Corporation
  • Patent number: 5717934
    Abstract: A user configurable, rule based sequencing of the shutdown of individual devices or the entire computer network is forwarded to a collection of software programmed microprocessors operating on the network. Every required device of the system is provided with shutdown software and a conventional UPS (known variously as an uninterruptable power supply, uninterruptable power system, uninterrupted power supply, and uninterrupted power system). A user interface program is used by a system administrator to configure the operation of the shutdown software. In the preferred embodiment, the network system includes, at a minimum, a file server coupled to a storage device containing a database, a database server, and at least one database work station, such as used for accounting purposes. Shutdown software and a UPS are coupled or otherwise associated with each of the file server, the database server, the work station and, when used, the network communication device.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: February 10, 1998
    Assignee: Deltec Electronics Corporation
    Inventors: Ronald L. Pitt, Carleton H. Smith
  • Patent number: 5684686
    Abstract: A boost-input backed-up uninterruptable power supply from an input voltage source, such as a 60 cycle 120/240 Vac service, provides an uninterrupted output voltage to a load connected to a return. The backed-up power supply has an input rectifier and low energy storage filter coupled to the input voltage source for converting the input voltage source into at least an unregulated positive dc voltage source, and an unregulated negative dc voltage source. Each respective unregulated source has a respective unregulated dc voltage value with respect to the return. Two 120V battery stacks provides respective positive and negative battery voltages at corresponding positive and negative battery output terminals.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 4, 1997
    Assignee: Deltec Electronics Corporation
    Inventor: Anantha Baddam Reddy
  • Patent number: 5087872
    Abstract: A circulating load apparatus for loading a power supply. The power supply has a power input terminal, a power output terminal and a power return terminal. The power supply provides an output voltage at the power output terminal with respect to the power return terminal. The output voltage of the power supply is controlled to be substantially identical in amplitude to the network voltage of a network source, provided at a network source terminal with respect to a source return terminal. The power supply, power return terminal is coupled to the network source, source return terminal. The power supply power input terminal is coupled to the network source terminal to be powered by voltage and current from the network source terminal. The circulating load apparatus has a voltage source for supplying a voltage between a first and second terminal. The voltage source is connected in series between the network source terminal and the power supply power output terminal.
    Type: Grant
    Filed: February 13, 1990
    Date of Patent: February 11, 1992
    Assignee: Deltec Electronics Corporation
    Inventor: Suresh C. Gupta
  • Patent number: 4977334
    Abstract: A crest factor correction circuit for an ac inverter receives inputs including a full-wave rectified output of the ac inverter having a fixed period and a periodic sequence of phase signals that divide each fixed period into predetermined phase intervals. An amplitude and crest factor signal circuit responds to the absolute value signal to provide an amplitude control signal proportional to the negative integral of the difference between the absolute value signal and a set reference voltage. The amplitude and crest factor signal circuit also provides a crest control signal proportional to the negative integral of the difference between the filtered peak value of the absolute value signal and a given reference voltage times a predetermined gain. A series resistor network responds to the amplitude control signal and to the crest control signal and provides a series of tap signals. Each tap signal is proportional to a respective predetermined ratio of the amplitude control signal.
    Type: Grant
    Filed: March 20, 1990
    Date of Patent: December 11, 1990
    Assignee: Deltec Electronics Corporation
    Inventor: Howard Handler
  • Patent number: 4920472
    Abstract: A crest factor correction circuit for an ac inverter receives inputs including a full-wave rectified output of the ac inverter having a fixed period and a periodic sequence of phase signals that divide each fixed period into predetermined phase intervals. An amplitude and crest factor signal circuit responds to the absolute value signal to provide an amplitude control signal proportional to the negative integral of the difference between the absolute value signal and a set reference voltage. The amplitude and crest factor signal circuit also provides a crest control signal proportional to the negative integral of the difference between the filtered peak value of the absolute value signal and a given reference voltage times a predetermined gain. A series resistor network responds to the amplitude control signal and to the crest control signal and provides a series of tap signals. Each tap signal is proportional to a respective predetermined ratio of the amplitude control signal.
    Type: Grant
    Filed: May 31, 1989
    Date of Patent: April 24, 1990
    Assignee: Deltec Electronics Corporation
    Inventor: Howard Handler