Patents Assigned to Diagtronix, Inc.
  • Publication number: 20140061728
    Abstract: A FET sensor with a gate biasing electrode is disclosed in one embodiment. In another embodiment, a process for forming a finFET sensor with a polysilicon gate biasing electrode is disclosed. In a further embodiment, a process for forming a finFET sensor with a single crystal gate biasing electrode is disclosed.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 6, 2014
    Applicant: Diagtronix Inc.
    Inventor: Krutarth Trivedi
  • Publication number: 20130214332
    Abstract: A transistor includes a source region, a drain region, and a nanogrid channel connecting the source and drain regions. The nanogrid channel includes first and second vertical channel regions connecting the source and drain regions. The first and second vertical channel regions have a space therebetween. A cross member extends from the first vertical channel region into the space.
    Type: Application
    Filed: August 21, 2012
    Publication date: August 22, 2013
    Applicant: Diagtronix, Inc.
    Inventor: Qiang Wu