Abstract: A 1553 data communication system having a primary data bus, a redundant data bus and a non-1553 data communication overlay system is provided. The non-1553 data communication overlay system comprises a non-1553 bus controller terminal and a non-1553 remote terminal. Each non-1553 terminal includes a non-1553 transmitter block connected to the primary bus and the redundant bus for sending non-1553 signals, a non-1553 receiver block for receiving non-1553 signals and a non-1553 receive path selection block. The non-1553 receive path selection block selectively establishes a receive path between the primary data bus or the redundant data bus and the non-1553 receiver block according to predefined receive path selection criteria. A 1553 data communication method is also provided.

Abstract: A data communication method for a set of hard real-time applications with an associated set of predefined network requirements (PNR) is provided. The method comprises configuring the physical layer of the network with a set of static modulation parameters (SMPs) to guarantee the PNRs are met at worst-case operating conditions for the network. The method further comprises measuring the current network performance within the network based on a given network performance monitoring schedule and, whenever the current network performance exceeds the PNRs by predefined amounts, adjusting the physical layer of the network by selecting a set of dynamic modulation parameters (DMP's) to increase the bandwidth availability within the network. Advantageously, the invention further allows for the allocation of the excess bandwidth to a set of non-hard real-time applications, whenever the current network performance exceeds the PNR.

Abstract: A system and method for implementation of MMU assisted data breakpoints for any number of data structures within a program application are provided. For each data structure for which a data breakpoint is desired, two distinct MMU entries are created. One MMU entry has access attributes. The other entry has an interrupt triggering sub-entry. According to the preferred embodiment, access to the second MMU entry causes a page fault.

Abstract: A system and method for allocating transmitter power to subcarriers of a multicarrier signal is provided. First, the subcarriers are transmitted with an initial set of power levels and an initial set of constellation assignments. Next, quantized SNR metric values are measured at the receiver for each subcarrier. The measured subcarrier quantized SNR metric is compared with the respective allocated constellation quantized SNR metric, for determining the excess SNR per subcarrier. The transmitter power of the subcarriers whose excess SNR is above a predetermined threshold is adjusted, while keeping the total transmitter power constant. The transmitter power may be adjusted for increasing throughput or robustness of the system. For increased accuracy, several training frames may be used. Advantageously, only constellations equally spaced, such as square or cross constellations, are used. According to a preferred embodiment, OFDM/DMT multicarrier system use IFFT prescalers in the transmitter power adjustment.

Abstract: Gain variations during a packet can lead to significant performance degradation in communications systems that use high order quadrature amplitude modulation (QAM). A method and the associated apparatus track such variations in an OFDM system and completely eliminate any performance degradation. Gain estimation and compensation is employed with the use of pilot subcarriers in the payload of an OFDM data packet. Estimated pilot magnitude ratios are averaged, throughout the processing life of a packet, to yield accurate gain estimations. A gain compensation factor is used to adjust data carriers. An exclusion method is also employed to eliminate pilot carriers which contribute to noise.

Abstract: The present invention provides an improved frequency doubling circuit, with adjustable phase offset. Briefly, rather than using the traditional equations cos (2?t)=cos 2(?t)?sin 2(?t) and sin(2?t)=2 sin(?t)cos(?t), the quadrature output signals are generated utilizing mixers, each having two input signals, separated in phase by the same offset. This minimizes the effects of the non-linearities introduced by the mixer, which therefore reduces amplitude mismatch between the quadrature signals. Also, the phase offset of the quadrature output signals can be tuned and calibrated using a phase shifting circuit. This phase shifting circuit realizes a tuning range of approximately 5° in programmable steps. This combination of circuits can be used to minimize the amplitude mismatch and phase errors, thereby reducing the amplitude of and interference caused by transmission of the image frequency to the receivers input.

Abstract: A 1553 data communication system having a primary data bus, a redundant data bus and a non-1553 data communication overlay system is provided. The non-1553 data communication overlay system comprises a non-1553 bus controller terminal and a non-1553 remote terminal. Each non-1553 terminal includes a non-1553 transmitter block connected to the primary bus and the redundant bus for sending non-1553 signals, a non-1553 receiver block for receiving non-1553 signals and a non-1553 receive path selection block. The non-1553 receive path selection block selectively establishes a receive path between the primary data bus or the redundant data bus and the non-1553 receiver block according to predefined receive path selection criteria. A 1553 data communication method is also provided.

Abstract: An interference cancellation (IC) system and method for use within a 1553 communication system comprising a data bus carrying primary signals having a 1553 component and a non-1553 component are provided. The IC system has an input port, a 1553 data extraction block and an interference cancellation circuit with an interference measurement and a cancellation block. The interference measurement block receives 1553 decoded data from the 1553 data extraction block and a sampled primary signal via the input port, and, within an impulse response block, produces an interference signal based on a 1553 impulse response system model. The cancellation block subtracts the interference signal from the sampled primary signal and produces an output signal with the 1553 component substantially cancelled. Furthermore, an IC system using adaptive filtering techniques within the impulse response block is provided. The Least Mean Squares (LMS) algorithm can be used as an adaptive filter technique.

Abstract: The invention relates to a novel methodology and apparatus for clock-offset compensation and common-phase offset correction in Frequency Division Multiplexing based wireless local area network (WLAN) environment, such as an Orthogonal Frequency Division Multiplexing (OFDM) environment. A curve fit, such as a threshold-based, least mean squares (LMS) fit of phase of the pilot sub-carriers in each OFDM symbol is used to estimate and counteract the rotation of the data sub-carriers due to residual frequency offset, low frequency phase noise, and clock offset. The invention is particularly well suited to wireless channels with multipath where pilots typically undergo frequency-selective fading. The thresholding LMS is implemented in a hardware-efficient manner, offering cost advantages over a weighted-LMS alternative. Additionally, the invention uses a unique phase-feedback architecture to eliminate the effects of phase wrapping, and avoid the need to refine channel estimates during packet reception.

Abstract: The present invention allows multi-channel communications equipment to detect and eliminate a false interpretation of interference as a valid signal. The solution is based on the observation that the simultaneous arrival of energy on two independent channels is an impossible event. So, when such an event happens, it is a reliable signature of confusing out-of-band energy for a valid signal.

Abstract: A communications system permits bandwidth configurability using a linear frequency modulated (LFM) waveform for transmitter/receiver synchronization. The system permits enhancement of MIL-STD-1553 data buses, and is likewise applicable to any bandwidth-configurable modem.

Abstract: An interference cancellation system and method for a communication system comprising a data bus carrying primary signals having an A component and a non-A component are provided. The interference cancellation system has an input port, an A data extraction block and an interference cancellation circuit. The input port receives a sampled primary signal from the data bus, via an analog-front end block having sampling means. The A data extraction block extracts A data from the sampled primary signal and outputs A decoded data. The interference cancellation circuit has an interference measurement block and a cancellation block. The interference measurement block receives the A decoded data and the sampled primary signal and produces an A interference signal. The cancellation block receives the sampled primary signal and the A interference signal and subtracts the A interference signal from the sampled primary signal, producing an output signal with the A component substantially attenuated.

Abstract: Upon a triggering event, a delay chain shifts data out at a higher rate than incoming packets and a processor controls bypassing circuitry to reduce the latency of hardware implementations of, for example, 802.11a OFDM receivers, with long delay chains. The signal processing algorithms used to recover symbol timing need a large number of samples stored in a delay chain, often consisting of pipelined registers. Such a delay chain introduces a large lag between the time samples have been acquired by the data converters and the time they are processed. This delay makes it difficult for higher level network layer implementations to meet the deadlines of 802.11a WLAN protocol. The proposed scheme implements dynamic reduction in the depth of the delay chain once timing recovery has been performed. A multi-step scheme achieves exponential reduction in the number of elements in the delay chain in every step.

Abstract: A synchronization system and method for use in a packet switched communication network are provided. The synchronization system comprises a transmitter-identification system, a packet-boundary detection system and a storage-access system. The transmitter-identification system enables each receiving terminal within the network to know the identity of the originating transmitter terminal for a given packet of information, prior to the reception of this packet of information. The packet-boundary detection system enables detection of packet synchronization parameters for all transmitter-receiver pairs of terminals within the network. The storage-access system stores the detected packet synchronization parameters and allows the receiver to access the packet synchronization parameters.

Abstract: The invention relates to a novel methodology and apparatus for clock-offset compensation and common-phase offset correction in Frequency Division Multiplixing based wireless local area network (WLAN) environment, such as an Orthogonal Frequency Division Multiplexing (OFDM) environment. A curve fit, such as a threshold-based, least mean squares (LMS) fit of phase of the pilot sub-carriers in each OFDM symbol is used to estimate and counteract the rotation of the data sub-carriers due to residual frequency offset, low frequency phase noise, and clock offset. The invention is particularly well suited to wireless channels with multipath where pilots typically undergo frequency-selective fading. The thresholding LMS is implemented in a hardware-efficient manner, offering cost advantages over a weighted-LMS alternative. Additionally, the invention uses a unique phase-feedback architecture to eliminate the effects of phase wrapping, and avoid the need to refine channel estimates during packet reception.

Abstract: The invention relates to a novel methodology and apparatus for clock-offset compensation and common-phase offset correction in Frequency Division Multiplexing based wireless local area network (WLAN) environment, such as an Orthogonal Frequency Division Multiplexing (OFDM) environment. A curve fit, such as a threshold-based, least mean squares (LMS) fit of phase of the pilot sub-carriers in each OFDM symbol is used to estimate and counteract the rotation of the data sub-carriers due to residual frequency offset, low frequency phase noise, and clock offset. The invention is particularly well suited to wireless channels with multipath where pilots typically undergo frequency-selective fading. The thresholding LMS is implemented in a hardware-efficient manner, offering cost advantages over a weighted-LMS alternative. Additionally, the invention uses a unique phase-feedback architecture to eliminate the effects of phase wrapping, and avoid the need to refine channel estimates during packet reception.

Abstract: Using a combination of auto-correlation and cross-correlation techniques provides a symbol timing recovery in a Wireless Local Area Network (WLAN) environment that is extremely robust to wireless channel impairments such as noise, multi-path and carrier frequency offset. An auto-correlator provides an estimate for a symbol boundary, and a cross-correlator is subsequently used to more precisely identify the symbol boundary. Peak processing of the cross-correlation results provides further refinement in symbol boundary detection. In receiving a packet conforming to the IEEE 802.11a standard, the method requires a minimum of only three short symbols of the 802.11a short preamble to determine timing, and guarantees timing lock within the duration of the 802.11a short preamble. This method and system can be easily applied to any other preamble based system such as 802.11g and High Performance Radio LAN/2 (HIPERLAN/2).

Abstract: The linearity of switched-capacitor, pipeline digital to analog converters is improved by balancing the settling behavior of its pre-charge switches. In more detail, a switched capacitor DAC includes a number of substantially identical cells, one cell for each bit of an input digital word. A number of switch driver circuits are used to apply respective switch control signals to turn respective switches on and off. Advantageously, the switch control signals differ by an amount determined to equalize the gate-to-source voltage difference between different switches.

Abstract: A frame fragmentation method for digital communications over error prone channels is presented. The technique maximizes data throughput based on the bit error rate and frame overhead. The technique can be used to determine optimum fragmentation thresholds for wireless links that are characterized by significant bit error rates.

Abstract: A system and method for converting an analog signal to a digital signal is provided. The analog to digital conversion is achieved without a dedicated sample-and-hold circuit. An ADC stage, preferably the front-end stage in the case of a pipeline ADC, samples the input voltage within a quantizer and within a residue generator. The sampling is performed with associated clocking signals and with switch capacitors also fulfilling the comparison with threshold voltages, within the quantizer and the generation of a residue signal within the residue generator.