Patents Assigned to EL MOS Elektronik in MOS-Technologie GmbH
  • Patent number: 6153916
    Abstract: An MOS transistor with high output voltage endurance comprises a semiconductor substrate with the surface thereof including a doping area having a surface doping concentration decreasing from the drain connection area to the drain-side edge of the gate oxide layer. This doping area is formed by ion implantation and subsequent outdiffusion of individual partial areas. The first partial area has a size in the drain-gate extension which is considerably larger than the penetration depth of the outdiffusion in the substrate. The second partial area has a size and a distance to the first partial area which are both smaller than the penetration depth of the outdiffusion in the substrate. In the outdiffused condition, the individual diffusions originating from the individual, respectively adjacent first and second partial areas merge into each other on the surface of the substrate to thus obtain a doping concentration gradient for a constant conduction type of the doping area.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: November 28, 2000
    Assignee: EL MOS Elektronik in MOS-Technologie GmbH
    Inventors: Walter Roth, Thomas Giebel