Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
Type:
Application
Filed:
August 18, 2023
Publication date:
December 7, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, George Apostol, JR., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl
Abstract: A Compute Express Link™ (CXL) over Ethernet (COE) station is provided to bridge a CXL fabric and an Ethernet network to allow for efficient native memory load/store access to remotely connected resources. The COE station supports CXL and Ethernet traffic through its CXL interface, scheduler/packers, decoders, VOQs and VIQs by adding COE tags to Ethernet frames. In CXL controller mode, the CXL controller drives the VOQs. In Ethernet mode, the COE module drives the VOQs, and interacts with the MAC sublayer and the PMA sublayer, which are responsible for encoding and decoding data signals for transmission through a serializer/deserializer.
Type:
Application
Filed:
June 6, 2023
Publication date:
November 30, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, Jeffrey S. Earl, Anant Thakar, Sagar Borikar
Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
Type:
Application
Filed:
June 28, 2022
Publication date:
January 26, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, George Apostol, Jr., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl
Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
Type:
Application
Filed:
June 28, 2022
Publication date:
January 19, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, George Apostol, Jr., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl
Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
Type:
Application
Filed:
June 28, 2022
Publication date:
January 19, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, George Apostol, JR., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl
Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
Type:
Application
Filed:
June 28, 2022
Publication date:
January 19, 2023
Applicant:
Elastics.cloud, Inc.
Inventors:
Shreyas Shah, George Apostol, JR., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl