Patents Assigned to Electric Co., Ltd.
  • Publication number: 20240178286
    Abstract: A semiconductor device, having: a substrate having a main surface with a recess; a device structure at the main surface; an interlayer insulating film covering the device structure; a contact hole penetrating through the interlayer insulating film to expose a portion of the device structure, the contact hole having a bottom configured by the recess; a barrier metal, including a titanium film provided along the side wall of the contact hole, and a titanium nitride film stacked on the titanium film and formed at the bottom of the contact hole; a titanium silicide film provided along an inner wall of the recess; a tungsten film provided on the barrier metal; and a metal electrode provided on the interlayer insulating film and the tungsten film. An upper surface of the titanium nitride film on the bottom of the contact hole is closer to the metal electrode than is the main surface.
    Type: Application
    Filed: September 26, 2023
    Publication date: May 30, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Takaaki SUZAWA, Makoto ENDOU, Makoto SHIMOSAWA
  • Publication number: 20240176257
    Abstract: A highly sensitive and highly durable positive charging multilayer electrophotographic photoreceptor includes: a conductive substrate; a charge transport layer containing at least a first hole transport material and a first resin binder; and a charge generation layer containing at least a second hole transport material, an electron transport material, a charge generation material, and a second resin binder, the charge transport layer and the charge generation layer being sequentially laminated on the conductive substrate.
    Type: Application
    Filed: September 28, 2023
    Publication date: May 30, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Seizo KITAGAWA, Kenichi OKURA
  • Publication number: 20240178081
    Abstract: A semiconductor module a metal base plate having a semiconductor unit including a semiconductor element, the metal base plate having an upper surface and a bottom surface opposite to each other and the semiconductor element being mounted on the upper surface, and a case surrounding a periphery of the semiconductor unit and being bonded to the upper surface of the metal base plate. The case includes a first positioning portion formed by a protrusion protruding a bottom of the case toward the metal base plate, and a second positioning portion formed by a hole or a cutout so as to at least partially overlap with the first positioning portion in a plan view of the semiconductor module. The metal base plate includes a first engagement portion formed by a hole or a cutout with which the first positioning portion is engageable.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 30, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kazuo ENOMOTO
  • Publication number: 20240178113
    Abstract: A positive electrode circuit pattern layer and a negative electrode circuit pattern layer each have a terminal region extending in a long-side direction of a rectangular insulating plate. Thicknesses of a positive electrode bonding region of a positive electrode terminal and a negative electrode bonding region of a negative electrode terminal are respectively less than thicknesses of the terminal regions of the positive electrode circuit pattern layer and the negative electrode circuit pattern layer. The lengths in the long-side direction of the positive electrode bonding region of the positive electrode terminal and the negative electrode bonding region of the negative electrode terminal are respectively greater than or equal to half the lengths in the long-side direction of the terminal regions of the positive electrode circuit pattern layer and negative electrode circuit pattern layer.
    Type: Application
    Filed: September 26, 2023
    Publication date: May 30, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Motohito HORI, Yoshinari IKEDA
  • Publication number: 20240173977
    Abstract: A method for improving adhesion of a nozzle plate to a flow feature layer of an ejection head. The method includes providing a silicon substrate having a device surface containing at least one array of fluid ejectors thereon. A photoresist material is spin-coated onto the device surface. The photoresist material is exposed to actinic radiation through a mask to provide the flow feature layer. The mask contains opaque areas defining fluid flow channels and fluid chambers in the photoresist material and masked areas adjacent to the plurality of fluid flow channels and fluid chambers. The masked areas contain a plurality of opaque geometric particles having a size ranging from about 1 to about 5 microns. The particles are effective to provide a roughened surface area for increased adhesion between the roughened surface area and a nozzle plate attached to the flow feature layer.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Applicant: Funai Electric Co., Ltd.
    Inventor: Sean T. Weaver
  • Publication number: 20240176096
    Abstract: An optical element driving apparatus includes: a movable part; a housing part configured to surround an outer periphery of the movable part and house the movable part, the housing part having a rectangular shape in plan view; a fixing part disposed on one side in an optical axis direction with respect to the movable part and the housing part; a leaf spring member configured to support the movable part such that the movable part is movable in the optical axis direction; and a wire member configured to support the housing part such that the housing part is movable in an optical axis orthogonal direction with respect to the fixing part. The wire member is configured such that a wire group including two or more wire members is disposed at each of four corners of the housing part and connected to a common leaf spring member.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Yukihiro TAKIMOTO, Masahiko ARANAI
  • Publication number: 20240172969
    Abstract: A biological information measuring device includes a light source that irradiates light, a sensor having a plurality of pixels arranged in an array in a two-dimensional plane and a saturation charge number of 1,000,000 or more. The sensor receives irradiated light transmitted, reflected, or scattered from the light source in a living body and outputs information according to the light intensity of the received light. A specific location selection unit selects a measurement target location of the measurement target for the biological information and a reference location different from the measurement target location, based on the information obtained by the image sensor. A biological information acquisition unit acquires biological information from the information obtained by the sensor at the measurement target location, using the information obtained by the sensor at the reference location as a reference.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 30, 2024
    Applicants: ZEON CORPORATION, TOHOKU UNIVERSITY, FURUKAWA ELECTRIC CO., LTD.
    Inventors: Koji KAWAJIRI, Rihito KURODA, Yasuyuki FUJIHARA, Shota NAKAYAMA, Hideaki HASEGAWA, Takayori ITO, Hiroyuki TAMAOKA
  • Patent number: 11997802
    Abstract: The present disclosure relates to an inverter module which can be coupled to another inverter module, the inverter module comprising: a main PCB having a main substrate on which a plurality of circuits are printed; a plurality of sub-PCBs coupled to the main PCB and each having one end exposed through the main PCB; and a case for receiving the main PCB and the sub-PCBs, wherein when the inverter module is coupled to another inverter module, the ends of the sub-PCBs exposed to the outside of the case are coupled to the another adjacent inverter module. According to the present disclosure, a plurality of inverter modules can be connected and used as one inverter system, and thus an inverter system having a required capacity can be easily implemented.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: May 28, 2024
    Assignee: LS ELECTRIC CO., LTD.
    Inventor: Young-Hoon Song
  • Patent number: 11997432
    Abstract: A display apparatus for displaying video made by laser light includes at least one laser of which the light output varies in accordance with current, a storage unit configured to store at least one conversion table for correcting current-light output characteristics of the laser so as to approximate to desired characteristics, and a control unit configured to retrieve the conversion table from the storage unit to cause the at least one laser to emit light based on data converted using the conversion table.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: May 28, 2024
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventor: Yuji Kimura
  • Patent number: 11996452
    Abstract: There is provided a semiconductor device including: a semiconductor substrate that has an upper surface and a lower surface and that is provided with a drift region of a first conductivity type; a trench portion that is provided to reach the drift region from the upper surface of the semiconductor substrate; and a mesa portion that is interposed between trench portions, in which the mesa portion has a base region of a second conductivity type that is provided between the drift region and the upper surface, and a first region that has a concentration peak of a hydrogen chemical concentration at a first depth position in the mesa portion.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Motoyoshi Kubouchi
  • Patent number: 11996975
    Abstract: The present disclosure relates to a method for network recovery when a communication failure has occurred in a RAPIEnet system. According to the present disclosure, through periodic transmission of a message for inspecting whether a network communication failure has occurred between LNM devices or between RNMs in a ring- or line-shaped network in a RAPIEnet system, it is possible to accurately determine whether a network has a communication failure, and recover the network without imposing a burden on the network.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: May 28, 2024
    Assignee: LS ELECTRIC CO., LTD.
    Inventors: Geon Yoon, Sung-Han Lee
  • Patent number: 11996374
    Abstract: External connection reliability is improved with an external connector including an external connection terminal, and a nut provided on a bottom surface side of the external connection terminal. The external connection terminal has a conductor, a first metal layer provided on an upper surface of the conductor, a second metal layer provided on the first metal layer, and a bottom surface metal layer provided on a bottom surface of the conductor.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hayato Nakano, Shun Sakai
  • Patent number: 11996347
    Abstract: A semiconductor device has a resistance element including a metal block, a resin layer disposed on the metal block, and a resistance film disposed on the resin layer and an insulated circuit board including an insulating plate and a circuit pattern disposed on the insulating plate and having a bonding area on a front surface thereof to which a back surface of the metal block of the resistance element is bonded. The area of the circuit pattern is larger in plan view than that of a front surface of the resistance element. The metal block has a thickness greater than that of the circuit pattern in a direction orthogonal to the back surface of the metal block. As a result, the metal block properly conducts heat generated by the resistance film of the resistance element to the circuit pattern.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yuhei Nishida
  • Patent number: 11996475
    Abstract: One object is to provide a semiconductor device capable of reducing loss during turn-on and degradation of forward voltage. A vertical MOSFET includes a semiconductor substrate 2 of a first conductivity type, a first semiconductor layer 1 of the first conductivity type, a second semiconductor layer 16 of a second conductivity type, first semiconductor regions 17 of the first conductivity type, first trenches 31 and a second trench 32, gate electrodes 20 provided in the first trenches 31 via a gate insulating film 19, and a Schottky electrode 29 provided in the second trench 32. The first trenches 31 are provided in a striped pattern, in a plan view and the second trench 32 surrounds the first trenches 31.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Masakazu Baba, Shinsuke Harada
  • Patent number: 11996350
    Abstract: A cooler includes a top plate having a plurality of fins provided on a surface thereof, and a circumferential wall part provided so as to surround outer circumferences of the plurality of fins along outer circumferential edges of the top plate, and a bottom plate bonded to distal ends of the circumferential wall part and the plurality of fins. A flow path for a coolant is formed by a space enclosed by the top plate, the circumferential wall part and the bottom plate. The bottom plate has inlet and discharge portions for the coolant. The inlet and discharge portions are disposed so as to face each other diagonally with the plurality fins interposed therebetween. An inner surface of the circumferential wall part has a step part that tilts from the inner surface of the circumferential wall part toward the discharge portion at a position neighboring to the discharge portion.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshihiro Tateishi, Takahiro Koyama, Hiromichi Gohara
  • Patent number: 11996763
    Abstract: An integrated circuit configured to switch a transistor in a power supply circuit. The integrated circuit includes a first terminal to which a first resistor is coupled; a first detection circuit configured to detect whether a load of the power supply circuit is in an overload state; a second detection circuit configured to detect whether a current flowing through the transistor is overcurrent; an oscillator circuit configured to output an oscillator signal with a cycle corresponding to a first resistance value of the first resistor; and a driving signal output circuit configured to output a driving signal to turn on the transistor, based on the oscillator signal, and turn off the transistor, based on a feedback voltage corresponding to the output voltage. The driving signal output circuit further outputs the driving signal to turn off the transistor, in response to the current flowing through the transistor reaching overcurrent.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: May 28, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Hiroshi Maruyama
  • Publication number: 20240167949
    Abstract: An irradiation probe is, for example, an irradiation probe in which a plurality of optical fibers are bundled together, each of the optical fibers having, as at least a partial section in a longitudinal direction, a leakage section that outputs leakage light radially outward. Each of the optical fibers has directivity in which intensity of leakage light in a specific radial direction is higher than intensity of leakage light in another radial direction in a cross section intersecting an axial direction of the leakage section. The optical fibers are disposed apart from a central axis of the irradiation probe in radial directions different from each other, and the optical fibers are bundled together in a posture in which leakage light to the specific radial direction from the leakage section is directed radially outward of the irradiation probe.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventor: Masaki IWAMA
  • Publication number: 20240170570
    Abstract: A semiconductor device includes an active region as a region through which main current flows, an active region perimeter that surrounds the active region, and an edge termination region that surrounds the active region perimeter. The active region perimeter includes: a semiconductor substrate; a drift layer of a first conductivity type; a base region of a second conductivity type provided on an upper surface side of the drift layer; a source region of a first conductivity type selectively provided on an upper surface side of the base region; a perimeter trench including a contact region of the second conductivity type selectively provided, having at least a sidewall on the active region side in contact with the source region, and provided to pass through the base region; and a source ring region provided to be in contact with the contact region.
    Type: Application
    Filed: September 29, 2023
    Publication date: May 23, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Takafumi UCHIDA
  • Publication number: 20240170376
    Abstract: A semiconductor device includes: a conductive substrate; a plurality of semiconductor chips each having a first main electrode on a bottom surface side and a second main electrode on a top surface side, the plural semiconductor chips being arranged to form a first column and a second column connected parallel to each other on the conductive substrate; and a control wiring substrate including an insulating layer, a plurality of top-surface conductive layers provided on a top surface of the insulating layer, and a plurality of bottom-surface conductive layers each having a narrower width than the insulating layer and provided on a bottom surface of the insulating layer, the bottom-surface conductive layers being arranged on the conductive substrate between the first column and the second column of the semiconductor chips.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 23, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kensuke MATSUZAWA, Taisuke FUKUDA
  • Patent number: D1028506
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: May 28, 2024
    Assignee: SHENZHEN HONGWANG NICEMAY ELECTRIC CO., LTD
    Inventor: Dewei Luo