Abstract: The present invention provides a self-driving circuit of a low voltage, large current, and high power density DC/DC converter. The converter comprises a transformer, power MOS transistors (S), output rectification portion (SRb 1, SR2), filter portion and demagnetizing portion. The first configuration of the self-driving circuit consists of Da, Ra, Ca, Qa for self-driving SR2; and the second configuration consists of Da, Ra, Sa, a delay driving circuit and an isolation differential circuit, for self-driving SR2. The self-driving circuit of the present invention may reduce the cross-conductive loss, and increase the converting efficiency.

Abstract: The present invention relates to a switching synchronization method of parallel converter system, wherein one of converters is the host and the others are slave converters. The host converter includes a first timer and a pulse-transmitting device, and the slave converter includes a second timer, pulse capture device, and a synchronization adjustment. At a fixed time Tk1, the host converter sends a synchronization pulse to the synchronization bus through the pulse-transmitting device; and in the slave converter the second timer records the time Tx of the edge of the synchronization pulse received by the pulse capture device from the synchronization bus.

Abstract: The present invention provides a self-driving circuit for DC/DC converter of a low voltage, high current, and high power density. The converter comprises a transformer, output rectification portion SR1 and voltage clamping. The first configuration of the self-driving circuit consists of resisters Ra1, Ra2, capacitors Ca1, Ca2, transistors Qa1, Qa2; and the second configuration consists of Da, small power MOS transistor SRa, an auxiliary winding Nsa, a delay driving circuit and a isolating differential circuit. The self-driving circuit of the present invention may reduce the cross-conductive loss, and increase the converting efficiency.

Abstract: The present invention relates to a switching synchronization method of parallel converter system, wherein one of converters is the host and the others are slave converters. The host converter includes a first timer and a pulse-transmitting device, and the slave converter includes a second timer, pulse capture device, and a synchronization adjustment. At a fixed time Tk1, the host converter sends a synchronization pulse to the synchronization bus through the pulse-transmitting device; and in the slave converter the second timer records the time Tx of the edge of the synchronization pulse received by the pulse capture device from the synchronization bus.

Abstract: The invention relates to a soft switching topological circuit. A zero voltage turn-on is realized when the main switch is turned on, by utilizing the resonance of the resonant inductor and the resonant capacitor after the auxiliary switch is turned on. Moreover, during the turn-off of the main switch, the resonant inductor withstands a voltage drop, which causes the energy-feed device corresponding to the auxiliary switch to feed no energy out when the auxiliary switch is turned on, thereby realizing zero current turn-on of the auxiliary switch, and increasing the circuit running efficiency.