Abstract: Embodiments of the present invention are directed to methods for efficient queue management, and device implementations that incorporate these methods, for systems that include two or more electronic devices that share a queue residing in the memory of one of the two or more electronic devices. In certain embodiments of the present invention, a discard field or bit is included in each queue entry. The bit or field is set to a first value, such as the Boolean value “0,” by a producing device to indicate that the entry is valid, or, in other words, that the entry can be consumed by the consuming device. After placing entries into the queue, the producing device may subsequently remove one or more entries from the queue by setting the discard field or bit to a second value, such as Boolean value “1.

Abstract: The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links.

Abstract: The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links.

Abstract: Disclosed herein is an improved sector remapping method that maps logical sectors into physical sectors in storage disks such as SATA (Serial ATA) drives without reducing either storage capacity or I/O performance efficiency. Under this sector remapping method, logical sectors of data can be written into the physical sectors of a storage device through control frames having padded data or information associated with the padded data, as well as data frames having real data to be stored. With the padded data to be added to the real data, the frames provide multiple physical sectors to be transmitted into the storage device in a single write operation. The sector remapping method can be implemented in a storage bridge coupled to a storage device such as SATA drives.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: When a new device is attached to a SAS expander, malfunctioning devices can cause many BCNs to be generated, which in turn can cause excessive re-discovery processes to be performed by initiators in a storage network. Therefore, the isolation of devices from the storage network until they can be validated as healthy is disclosed. Any device malfunctions during this time of isolation do not cause BCNs to be generated and do not cause re-discovery processes to be performed. Once the device is validated (via a port-test-before-insertion approach) and found to be healthy, the fabric is notified via a BCN, and the device can be made visible to the network.

Abstract: A hardware-based offload engine is disclosed for mapping protected data into frames. For a write operation, the HBA determines host addresses and the size of data to be read from those addresses. The HBA also determines the frame size and protection scheme for data to be written. A frame transmit engine reads each host descriptor in the host data descriptor list to determine the location and byte count of the data to be read. A DMA engine reads the protection information/scratch area to determine the exact data size used to fill each frame and the protection scheme, and retrieves one or more free frame buffers. Check bytes are inserted alongside the data and stored in free frame buffers. After each frame is filled, the frame transmit engine also generates and stores header information for that frame, and then combines header, data and check bytes for transmission over the network.

Abstract: Auto-discrimination between FC and SATA devices upon insertion of a device into a port of a FAST-compatible switch is disclosed. Without user intervention, the port is able to determine the type of device attached, set the appropriate data rate in the Phy or SERDES and, in the case of FC or SATA drives, start the disk insertion process into the active switch zones. The SERDES is first initialized to FC speeds, and the receive path is searched for a receive signal. Upon detecting a receive signal, the detection circuitry then checks to see if a valid SATA Out Of Band (OOB) sequence is received. If a valid SATA OOB sequence is received, the SERDES is configured for SATA speeds and analog settings. If a valid SATA OOB sequence is not received, and instead a FC auto-negotiation process runs to completion, the SERDES remains at FC speeds.

Abstract: A system for enabling SATA drives to be utilized in FC SANs is disclosed. To send data to a SATA drive over a FC SAN, a host sends SCSI commands encapsulated in FC frames over a standard FC link to a Fibre Channel Attached SATA Tunneling (FAST) RAID controller, where the SCSI commands are de-encapsulated from the FC frames and translated to SATA FISs. The SATA FISs are thereafter encapsulated into FC frames. The IOC that performs these functions is referred to as a FAST IOC. The SATA-encapsulated FC frames are sent to multiple disk drive enclosures over another standard FC link. The FC frames are de-encapsulated by FAST switches in disk drive enclosures to retrieve the SATA FISs, and the SATA FISs are sent to the SATA drives over a SATA connection.

Abstract: An intelligent network processor is disclosed that provides a PCI express (PCIe) host bus adapter with firmware selectable hardware capabilities and firmware enabled emulation of capabilities not supported by hardware. Support for Fibre Channel (FC) and Gigabit Ethernet (GbE) protocols are provided through the same fabric ports, including multiple port trunking for both protocols. On chip protocol conversion is provided for switching and routing between FC and GbE ports. Switching using the same crossbar module is provided for both FC and GbE protocols. The crossbar module is coupled to directly access external DDR memory so that messages from FC, GbE, and PCIe interfaces may be switched directly to the DDR memory.

Abstract: Disclosed is a system method and software for user customizable device insertion. A new device is to be inserted in a loop based network such as an FC-AL network. The network is facilitated by a dedicated networking element, such as a switch. In order to ensure that the new device does not adversely affect the network, the new device is tested before it is inserted. Several tests are provided and the user is allowed to choose which tests are to be used. Alternatively, the user is allowed to define his/her own tests. The device is inserted into the network only after it has satisfactorily completed the applicable tests.

Abstract: The discovery and configuration of devices of interest connected to the Ethernet by an Ethernet port is disclosed. To perform discovery, Client software in a management interface transmits packets including the address of the management interface and a port identifier to a known broadcast address, requesting the MAC address for all devices of interest. Server software in the devices of interest parse the broadcast packets and broadcast a packet containing a MAC address that uniquely identifies the devices of interest back to the Client. Once the MAC addresses are returned to the Client, the Client can then broadcast protocol packets requesting the configuration of a specific device of interest such as a new IP address. Once a device of interest is configured with at least an IP address, the device of interest can communicate using TCP/IP, and it can thereafter be managed using higher level tools and firmware.

Abstract: The synchronization of trunk failover between two FC-AL switches when a primary trunk failure occurs is disclosed. If primary trunk T1 should fail, S1 bypasses the cascade port and sends a MaRK (MRK) ordered set out over duplicate trunk T2 to switch S2. In response, S2 sends an acknowledgement MRK ordered set over T2 back to S1. S1 then reconfigures the switch to establish T2 as the primary trunk, and acts as a masters in the failover process and initiates LIP ordered sets which are communicated to all devices in the system to initialize them. Note that when S2 receives the MRK ordered set and acknowledges it by sending an acknowledgement MRK back to S1, it acts as a slave in the failover process and does not attempt to initiate LIPs, thereby eliminating the possibility of multiple Loop Initialization cycles and reducing the time in which data cannot be transmitted.

Abstract: An interrupt notification block stored in host memory is disclosed that contains an image of the interrupt condition contents that may be stored in a host attention register in a host interface port. The interrupt notification block is written by the host interface port and pre-fixed into the port pointer array of a host at the time the host interface port updates the pointers stored in a port pointer array in host memory. The host may then read the interrupt notification block to determine how to process a response or an interrupt rather than having to read the host attention register in the host interface port across the host bus.

Abstract: Embodiments of the present invention are directed to providing continuously updated completion time and an average completion time information for I/O commands on a per-LU, per-target, per-port basis. This measurement is performed by a kernel device driver that handles the I/O for the system at lower layers, so the measurements are more accurate because the delays due to higher level processing are not included. This approach allows the driver to track movements in the average I/O command completion time per LU and limit outstanding I/O counts early enough to potentially prevent overload conditions. By catching the overload early, the invention also has the ability to restore the original outstanding I/O count as the overload condition subsides.

Abstract: Embodiments of the present invention allow for address scaling of existing addresses in a FC, FCoE, CEE or other type of network. More specifically, subaddresses can be used in conjunction with existing addresses, so that a combination of a subaddress and existing address can identify an addressable entity. Thus, multiple entities can be share a single existing address and be distinguished among each other by way of their respective subaddresses. Some embodiments of the invention allow for use of the inventive subaddressing scheme in conjunction with devices or network elements (e.g., gateways, switches, etc.) that may not be subaddressing aware. Further embodiments allow for the multiple distinct devices to communicate with a single Fibre Channel switching element through a single port by using N_Port_ID Virtualization.

Abstract: The Fiber Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fiber Channel. A Fiber Channel Fabric is an entity which transmits Fiber Channel frames between connected Node Ports. The Fiber Channel fabric routes the frames based on the destination address as well as other information embedded in the Fiber Channel frame header. Node Ports are attached to the Fiber Channel Fabric through links.

Abstract: Embodiments of the present invention are related to a device and a method for more efficiently processing Ethernet communications that include FCOE communications. In some embodiments the device is a single device including a combination of an aggregator, a filter and a gateway. Such a combination can be more practical, affordable and efficient than the usual arrangement of a several separate devices. In other embodiments, the device of the present invention can be a combination of a switch and a gateway. In yet other embodiments other types of devices can be used. More generally, embodiments of the present invention can apply to a device or method for processing communications involving a set of two network protocols (first and second protocols) as well as a third protocol, the third protocol being compatible with the first protocol and used to define how to tunnel the second protocol over the first protocol.

Abstract: A network arbitration scheme is disclosed that manages device access fairness by selectively and dynamically increasing a requestor queue's likelihood of being serviced. A requestor queue increases its service priority by duplicating a request entry onto a set of priority rings maintained by arbitration hardware in a host bus adapter. Duplication occurs when (1) a requestor's queue fill count (the number of descriptors stored in the queue) exceeds a watermark level or (2) a requestor's queue timer times out. In the case of time-out, the requester in the lower priority ring will duplicate itself in the higher priority ring. Because the arbitration hardware services requesters using a round robin selection scheme, the likelihood of a requestor queue being serviced increases as the number of its duplicate request entries on a priority ring increases. Upon being serviced, the requester is able to perform the requested action.

Abstract: The avoidance of port collisions in a hardware-accelerated network protocol, such as Transmission Control Protocol (TCP)/Internet Protocol (IP), is disclosed. In one example, a hardware-accelerated host bus adaptor (HBA) offloads protocol processing from a host computer's operating system. However, a port collision occurs if a non-accelerated host TCP/IP stack and a hardware accelerated host bus adapter TCP/IP stack choose the same port for establishing a network connection. In a double-ended TCP/IP acceleration connection, a unique TCP port is bound to the accelerated TCP/IP stack. In a single-ended TCP/IP acceleration connection, either the host TCP/IP stack is prevented from using that port or a non-accelerated connection is associated with an accelerated connection without binding a port.