Patents Assigned to Endicott Interconnect Technologies, Inc.
  • Patent number: 7738249
    Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: June 15, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, Frank D. Egitto, How T. Lin, Roy H. Magnuson, Voya R. Markovich, David L. Thomas
  • Patent number: 7738631
    Abstract: A specimen inspection system includes a photon source for outputting photons along a transmission path and a conveyor for translating a specimen completely through the transmission path. A radiation detector is positioned offset with respect to the transmission path for detecting photons that are scattered from the transmission path in response to interaction with the specimen passing therethrough. A controller determines from the detected scattered photons that a first material is present in the specimen.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: June 15, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David S. Rundle
  • Patent number: 7712210
    Abstract: A method of making a printed circuit board in which at least two circuitized substrates are aligned and bonded together (e.g., using lamination). A gasket is provided on one of these and a facing circuitized portion on the other. The gasket forms an effective seal about the circuitized portion to prevent heated dielectric material from contacting the circuitry. After bonding, parts of the bonded structure, including the gasket, are removed to leave a projecting edge portion having circuitry thereon. This edge portion is then adapted for being positioned within an edge connector.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: May 11, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Thomas R. Miller, Duane A. Stanke, Robert J. Testa
  • Patent number: 7713767
    Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: May 11, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Patent number: 7705319
    Abstract: A CdZnTe photon counting detector includes a core material of Cd1-xZnxTe, where (0?x<1), an anode terminal on one side of the core material and a cathode terminal on a side of the core material opposite the anode terminal. At least one of the following is selected in the design of the detector as a function of the maximum sustainable photon flux the core material is able to absorb in operation while avoiding polarization of the core material: electron lifetime-mobility product of the core material; de-trapping time of the core material; a value of a DC bias voltage applied between the anode and the cathode; a temperature of the core material in operation; a mean photon flux density to be absorbed by the core material in operation; and a thickness of the core material between the anode and the cathode.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: April 27, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Derek S. Bale, Stephen A. Soldner, Csaba Szeles
  • Patent number: 7705320
    Abstract: A semiconductor radiation detector (1?, 1?, 1??, 1??) includes a body of semiconducting material (2) responsive to ionizing radiation for generating electron-hole pairs in the bulk of said body (2). A conductive cathode (4) is disposed on one side of the body (2) and an anode structure (6) is disposed on the other side of the body (2). The anode structure (6) includes a first set of spaced elongated conductive fingers (8) in contact with the body (2) and defining between each pair of fingers thereof an elongated gap (10) and a second set of spaced elongated conductive fingers (12) positioned above the surface of the body (2) that includes spaced elongated conductive fingers (8). Each finger of the second set of spaced elongated conductive fingers (12) overlays, either partially or wholly, the elongated gap between a pair of adjacent fingers of the first set of spaced elongated conductive fingers (8).
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: April 27, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: Stephen A. Soldner
  • Patent number: 7687724
    Abstract: A circuitized substrate which utilizes at least one internal (embedded) resistor as part thereof, the resistor comprised of a material including resin and a quantity of powders of nano-particle and/or micro-particle sizes. The resistor serves to decrease the capacitance in the formed circuit while only slightly increasing the high frequency resistance, thereby improving circuit performance through the substantial elimination of some discontinuities known to exist in structures like these. An electrical assembly (substrate and at least one electrical component) is also provided.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: March 30, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Michael J. Rowlands
  • Patent number: 7687722
    Abstract: A circuitized substrate including a composite layer comprising a first dielectric sub-layer comprised of a halogen-free resin and fibers dispersed therein and a second dielectric sub-layer without fibers but also including a halogen-free resin with inorganic particulates therein. A method of making such a substrate is also provided, as is a multilayered assembly including one or more such circuitized substrates, possibly in combination with other substrates. An information handling system designed for having one or more such circuitized substrates is also provided.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: March 30, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papthomas
  • Patent number: 7679005
    Abstract: A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: March 16, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, Frank D. Egitto, Roy H. Magnuson, Voya R. Markovich, David L. Thomas
  • Patent number: 7665207
    Abstract: A method of making a multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: February 23, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Lawrence R. Fraley, Voya Markovich
  • Patent number: 7646098
    Abstract: A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: January 12, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Patent number: 7638776
    Abstract: A radiation detection/imaging system includes a first set of radiation detectors spaced from each other in a first direction and a second set of radiation detectors spaced from each other in the first direction. The second set of radiation detectors is positioned laterally adjacent the first set of radiation detectors and the radiation detectors of the first and second sets of radiation detectors are arranged in an alternating or staggered pattern in the first direction. A composite image can be formed of the passage of radiation through an object acquired by the first and second sets of radiation detectors as the object is translated by the first and second sets of radiation detectors.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: December 29, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: Viatcheslav Vydrin
  • Patent number: 7635552
    Abstract: A photoresist composition, e.g., a positive acting resist, for use in the formation of circuit patterns and the like on printed circuit boards and the like circuitized substrates, the photoresist composition including a quantity of silver therein in a sufficient amount to substantially prevent bacteria formation within said composition. A method of making the composition is also provided.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: December 22, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ross W. Keesler, John J. Konrad, Roy H. Magnuson, Robert A. Sinicki
  • Patent number: 7633068
    Abstract: In operation of a photon counting detecting system (10), a number of pulse counts output by least one pixel (20) of a photon counting detector in response to experiencing a photon flux density during a sample interval is acquired and a photon flux density (46) or value related thereto corresponding to the pulse counts output by the pixel (20) is determined. A correction (48) for the thus determined photon flux density (46) or value related thereto is determined. A corrected number of pulse counts (52) is determined for the pixel (20) as a function of the thus determined corrected photon flux density value or value related thereto. An image can be displayed that is a function of the corrected number of pulse counts for pixels of the system.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: December 15, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: Derek S. Bale
  • Patent number: 7629684
    Abstract: An electronic package which includes a substrate (e.g., a chip carrier substrate or a PCB), an electronic component (e.g., a semiconductor chip), a heatsink and a thermal interposer for effectively transferring heat from the chip to the heatsink. The interposer includes a compressible, resilient member (e.g., an elastomeric pad) and a plurality of thin, metallic sheets (e.g., copper foils) and the thickness thereof can be adjusted by altering the number of such foils.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: December 8, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: David J. Alcoe, Varaprasad V. Calmidi
  • Patent number: 7629559
    Abstract: A method of improving conductive paste connections in a circuitized substrate in which at least one and preferably a series of high voltage pulses are applied across the paste and at least one and preferably a series of high current pulses are applied, both series of pulses applied separately. The result is an increase in the number of conductive paths through the paste connections from those present prior to the pulse applications and a corresponding resistance reduction in said connections.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: December 8, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Subahu D. Desai, John M. Lauffer, How T. Lin, Voya R. Markovich, Ronald V. Smith
  • Patent number: 7627947
    Abstract: A method of making a multilayered circuitized substrate in which a continuous process is used to form electrically conductive layers which each will form part of a sub-composite. The sub-composites are then aligned such that openings within the conductive layers are also aligned, the sub-composites are then bonded together, and a plurality of holes are then laser drilled through the entire thickness of the bonded structure. The dielectric layers used in the sub-composites do not include continuous or semi-continuous fibers therein, thus expediting hole formation there-through.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: December 8, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Thomas J. Davis, Subahu D. Desai, John M. Lauffer, James J. McNamara, Jr., Voya R. Markovich
  • Patent number: 7629541
    Abstract: A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: December 8, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: David V. Caletka, Frank D. Egitto
  • Patent number: 7622384
    Abstract: A method of making an electronic package which includes a circuitized substrate having at least two electrical components positioned thereon. The package includes patterns of contact sites, each for having one of the components coupled thereto. The patterns of contact sites in turn are electrically interconnected by a grouping of conductive lines which, to substantially prevent skew, are of substantially the same length. The method involves forming the line patterns in such a manner so as to reduce line skew.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: November 24, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: Irving Memis
  • Patent number: 7612345
    Abstract: A radiation detector crystal is made from CdxZn1-xTe, where 0?x?1; an element from column III or column VII of the periodic table, desirably in a concentration of about 1 to 10,000 atomic parts per billion; and the element Ruthenium (Ru), the element Osmium (Os) or the combination of Ru and Os, desirably in a concentration of about 1 to 10,000 atomic parts per billion using a conventional crystal growth method, such as, for example, the Bridgman method, the gradient freeze method, the electro-dynamic gradient freeze method, the so-call traveling heater method or by the vapor phase transport method. The crystal can be used as the radiation detecting element of a radiation detection device configured to detect and process, without limitation, X-ray and Gamma ray radiation events.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: November 3, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Csaba Szeles, Scott E. Cameron, Vincent D. Mattera, Jr., Utpal K. Chakrabarti