Patents Assigned to Enraytek Optoelectronics Co., Ltd.
  • Patent number: 10490701
    Abstract: An LED chip comprises: an operation substrate; a first conductive layer disposed on a functional surface of the operation substrate; a die disposed on the first conductive layer, wherein the die comprises a first semiconductor layer and a second semiconductor layer; a first electrode layer electrically connected with the first conductive layer; and a second electrode layer electrically connected with the second semiconductor layer, wherein a first isolation layer is disposed between the second electrode layer and the first conductive layer. In embodiments of the present disclosure, the first electrode layer and the second electrode layer are disposed on the bottom surface of the operation substrate, and are formed after the LED die is formed. Therefore, a dicing process and a packaging process are not required, thus, process steps are simplified and process cost is reduced, which is conducive to achieve “free packaging” technology.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 26, 2019
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Huiwen Xu, Zhengguo Yu, Qiming Li
  • Patent number: 10283346
    Abstract: A method for recycling a sapphire substrate is disclosed. The method includes the steps of: high-temperature baking, wherein an intact epitaxial wafer to be scrapped is placed and baked in a baking oven at a high temperature of from 600° C. to 1000° C., and wherein the epitaxial wafer contains the sapphire substrate; and high-temperature rinsing in a concentrated acid, wherein the baked epitaxial wafer is then rinsed in the concentrated acid having a concentration ranging from 60% to 99% at a high temperature of from 160° C. to 300° C. The method can be used for recycling both patterned and smooth sapphire substrates.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: May 7, 2019
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Houyong Ma, Jing Ju, Zhengzhang You, Qiming Li, Jingchao Xie
  • Patent number: 9842963
    Abstract: A GaN-based LED epitaxial structure comprises a non-doped GaN buffer layer, an undoped GaN layer, an N-type GaN layer, an InGaN/GaN superlattice quantum well structure, a multiple quantum well luminous layer structure, an AlGaN layer, a low-temperature P-type layer, a P-type electron blocking layer and a P-type GaN layer which are sequentially stacked, wherein the non-doped GaN buffer layer comprises a sandwich structure consisting of a GaN layer, an AlGaN layer and a GaN layer which are sequentially stacked. For the GaN-based LED epitaxial structure and the preparation method thereof, the non-doped GaN buffer layer with the sandwich structure consisting of the GaN layer, the AlGaN layer and the GaN layer is used as a buffer layer, the buffer layer changes light scattering directions by using materials with different refractive indexes and thus the luminous efficiency can be improved.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: December 12, 2017
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Houyong Ma, Qiming Li, Yu Zhang, Huiwen Xu
  • Patent number: 9735316
    Abstract: A method for manufacturing a high voltage LED flip chip is provided, including: providing a substrate; forming an epitaxy stacking layer on the substrate; etching the epitaxy stacking layer to form a first groove and a Mesa-platform on each chip-unit region; forming a first electrode on each of the Mesa-platforms, wherein the first electrodes on two neighboring chip-unit regions form a second groove; forming a first insulation layer covering the Mesa-platforms and the first electrodes, filling the second groove and partially filling the first grooves to form a third groove; etching the first insulation layer to form fourth groove; and forming an interconnection electrode, wherein the interconnection electrode fills the third groove and the fourth groove, two neighboring interconnection electrodes form a fifth groove, the interconnection electrode connects the first electrode on one chip-unit region and the first semiconductor layer on the other chip-unit region. LED formed has improved performance.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: August 15, 2017
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Huiwen Xu, Yu Zhang, Qiming Li
  • Patent number: 9698197
    Abstract: A high-voltage flip LED chip and a manufacturing method thereof. In the high-voltage flip LED chip, a P-N electrode connecting metal block is filled into an isolation trench between two adjacent chip units and is respectively filled into a first electrode hole of one chip unit and a second electrode hole of the other chip unit to serially connect the two adjacent chips.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: July 4, 2017
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Huiwen Xu, Yu Zhang, Qiming Li
  • Patent number: 9698305
    Abstract: A high voltage LED flip chip includes two or more regions; a Mesa-platform, the Mesa-platform in each region has a first groove; a first electrode located on the Mesa-platform, an area between the first electrodes in two adjacent regions forms a second groove; a first insulation layer covering the Mesa-platforms and the first electrodes, the first insulation layer fills the second groove and partially fills the first groove, and a part of the first groove which is not filled forms a third groove; a fourth groove formed in the first insulation layer, the fourth groove exposes a surface of the first electrode; and an interconnection electrode, the interconnection electrode comprises a first portion connecting the first semiconductor layer through the third groove in a particular region with the first electrode through the fourth groove in another region adjacent to the particular region. The LED formed has improved performance.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 4, 2017
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Huiwen Xu, Yu Zhang, Qiming Li
  • Patent number: 9601660
    Abstract: A method of fabricating a flip-chip photonic-crystal light-emitting diode (LED) is disclosed. The method includes the steps of: providing an initial substrate including an epitaxial-growth surface and a light-output surface; performing a nanoimprint process on the epitaxial-growth surface of the initial substrate to form a nano-level patterned substrate; forming a flip-chip LED structure on the epitaxial-growth surface of the nano-level patterned substrate; and performing a nanoimprint process on the light-output surface of the nano-level patterned substrate to form the flip-chip photonic-crystal LED. The formation of the photonic-crystal structure on the light-output surface results in enhanced LED light extraction and emission efficiency.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: March 21, 2017
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventor: Leke Wu
  • Publication number: 20160365483
    Abstract: A high voltage LED flip chip includes two or more regions; a Mesa-platform, the Mesa-platform in each region has a first groove; a first electrode located on the Mesa-platform, an area between the first electrodes in two adjacent regions forms a second groove; a first insulation layer covering the Mesa-platforms and the first electrodes, the first insulation layer fills the second groove and partially fills the first groove, and a part of the first groove which is not filled forms a third groove; a fourth groove formed in the first insulation layer, the fourth groove exposes a surface of the first electrode; and an interconnection electrode, the interconnection electrode comprises a first portion connecting the first semiconductor layer through the third groove in a particular region with the first electrode through the fourth groove in another region adjacent to the particular region. The LED formed has improved performance.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 15, 2016
    Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Huiwen XU, Yu ZHANG, Qiming LI
  • Publication number: 20160365485
    Abstract: A high-voltage flip LED chip and a manufacturing method thereof. In the high-voltage flip LED chip, a P-N electrode connecting metal block is filled into an isolation trench between two adjacent chip units and is respectively filled into a first electrode hole of one chip unit and a second electrode hole of the other chip unit to serially connect the two adjacent chips.
    Type: Application
    Filed: June 8, 2016
    Publication date: December 15, 2016
    Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Huiwen XU, Yu ZHANG, Qiming LI
  • Publication number: 20160365482
    Abstract: A method for manufacturing a high voltage LED flip chip is provided, including: providing a substrate; forming an epitaxy stacking layer on the substrate; etching the epitaxy stacking layer to form a first groove and a Mesa-platform on each chip-unit region; forming a first electrode on each of the Mesa-platforms, wherein the first electrodes on two neighboring chip-unit regions form a second groove; forming a first insulation layer covering the Mesa-platforms and the first electrodes, filling the second groove and partially filling the first grooves to form a third groove; etching the first insulation layer to form fourth groove; and forming an interconnection electrode, wherein the interconnection electrode fills the third groove and the fourth groove, two neighboring interconnection electrodes form a fifth groove, the interconnection electrode connects the first electrode on one chip-unit region and the first semiconductor layer on the other chip-unit region. LED formed has improved performance.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 15, 2016
    Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Huiwen XU, Yu ZHANG, Qiming LI
  • Publication number: 20160276529
    Abstract: A GaN-based LED epitaxial structure comprises a non-doped GaN buffer layer, an undoped GaN layer, an N-type GaN layer, an InGaN/GaN superlattice quantum well structure, a multiple quantum well luminous layer structure, an AlGaN layer, a low-temperature P-type layer, a P-type electron blocking layer and a P-type GaN layer which are sequentially stacked, wherein the non-doped GaN buffer layer comprises a sandwich structure consisting of a GaN layer, an AlGaN layer and a GaN layer which are sequentially stacked. For the GaN-based LED epitaxial structure and the preparation method thereof, the non-doped GaN buffer layer with the sandwich structure consisting of the GaN layer, the AlGaN layer and the GaN layer is used as a buffer layer, the buffer layer changes light scattering directions by using materials with different refractive indexes and thus the luminous efficiency can be improved.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 22, 2016
    Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Houyong MA, Qiming LI, Yu ZHANG, Huiwen XU
  • Patent number: 9419173
    Abstract: A flip-chip LED and a method for forming the LED are disclosed. The method includes: providing a substrate and depositing on the substrate an epitaxial layer including, from the bottom upward, an n-type GaN layer, a multi-quantum well active layer, and a p-type GaN layer; etching the epitaxial layer to form an array of openings exposing the n-type GaN layer; forming a first metal layer on the p-type GaN layer; annealing the first metal layer to induce self-assembly thereof; etching the p-type GaN layer by using the first metal layer as a mask such that an array of holes formed therein; and depositing a second metal layer over the array of holes, the second metal layer and the first metal layer form a metal reflector layer. The design can result in an improvement in the light extraction efficiency of the LED.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: August 16, 2016
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventor: Hongbo Yu
  • Patent number: 9345086
    Abstract: A lighting circuit comprises a first rectifying diode (D1), a second rectifying diode (D2), a third rectifying diode (D3), a fourth rectifying diode (D4), a first group of LEDs (LED11, . . . , LED1n), a second group of LEDs (LED21, . . . , LED2n), a third group of LEDs (LED31, . . . , LED3n), and a fourth group of LEDs (LED41, . . . , LED4n). The first group of LEDs (LED11, . . . , LED1n) is connected between the anode and the cathode of the first rectifying diode (D1); the second group of LEDs (LED21, . . . , LED2n) is connected between the anode and the cathode of the second rectifying diode (D2); the third group of LEDs (LED31, . . . , LED3n) is connected between the anode and the cathode of the third rectifying diode (D3); the fourth group of LEDs (LED41, . . . , LED4n) is connected between the anode and the cathode of the fourth rectifying diode (D4).
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: May 17, 2016
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventor: Richard Rugin Chang
  • Patent number: 9306122
    Abstract: An LED includes a first electrode, for connecting the LED to a negative electrode of a power supply and a substrate located on the first electrode in which a plurality of contact holes are formed extending through the substrate. The diameter of upper parts of the contact holes is less than the diameter of lower parts of the contact holes, and the contact holes are filled with electrode plugs connecting the first electrode to the LED die. The light emitting device includes the LED, and further includes a susceptor and an LED mounted on the susceptor. The manufacturing method includes forming successively an LED die and a second electrode on a substrate, patterning a back surface of the substrate to form inverted trapezoidal contact holes which expose the LED die, and filling the contact holes with conductive material until the back face of the substrate is covered by the conductive material.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: April 5, 2016
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Richard Rugin Chang, Deyuan Xiao
  • Publication number: 20150349195
    Abstract: A flip-chip LED and a method for forming the LED are disclosed. The method includes: providing a substrate and depositing on the substrate an epitaxial layer including, from the bottom upward, an n-type GaN layer, a multi-quantum well active layer, and a p-type GaN layer; etching the epitaxial layer to form an array of openings exposing the n-type GaN layer; forming a first metal layer on the p-type GaN layer; annealing the first metal layer to induce self-assembly thereof; etching the p-type GaN layer by using the first metal layer as a mask such that an array of holes formed therein; and depositing a second metal layer over the array of holes, the second metal layer and the first metal layer form a metal reflector layer. The design can result in an improvement in the light extraction efficiency of the LED.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 3, 2015
    Applicant: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventor: Hongbo YU
  • Patent number: 9202985
    Abstract: A light emitting diode (LED) and a forming method thereof are provided. The LED includes a semiconductor substrate, a bonding layer formed on a surface of the semiconductor substrate, and a LED die formed on a surface of the bonding layer. The effective lighting area of the LED may be increased, heat radiation may be improved, and lighting efficiency may be enhanced.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: December 1, 2015
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Deyuan Xiao, Richard Rugin Chang
  • Patent number: 9082891
    Abstract: A method for manufacturing a deep isolation trench (221) and a method for manufacturing a high-voltage LED chip. Steps of the method for manufacturing a deep isolation trench (221) are as follows: forming a mask layer (202) on a substrate (200), and forming, in the mask layer, through etching, multiple windows (204) isolated from each other, the bottom of each window exposing the substrate; with epitaxial lateral overgrowth, forming an epitaxial structure (212) inside each window and a part of the mask layer around the window, respectively, each epitaxial structure having a trapezoidal cross section with a long bottom and a short top, and a gap between adjacent epitaxial structures forming a first deep trench (214); etching each epitaxial structure, forming a first shoulder (218) and a second shoulder (221) at both sides of each epitaxial structure, respectively, and forming a deep isolation trench above the mask layer between the adjacent epitaxial structures.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: July 14, 2015
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Lujun Yao, Deyuan Xiao, Richard Ru-Gin Chang, Hongbo Yu
  • Patent number: D794582
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 15, 2017
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Shuai Zhang, Huiwen Xu, Tingting Yu, Qiming Li
  • Patent number: D795822
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 29, 2017
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Shuai Zhang, Huiwen Xu, Tingting Yu, Qiming Li
  • Patent number: D824343
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: July 31, 2018
    Assignee: ENRAYTEK OPTOELECTRONICS CO., LTD.
    Inventors: Xiushan Zhu, Ling Tong, Huiwen Xu