Patents Assigned to ETA Semiconductor Inc.
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Publication number: 20160087590Abstract: A novel method to provide power management to a radio frequency amplifier is described. The method makes use of a DC-AC resonant switching power converter, a resonant tunable network and a rectifier to track the envelope signal of a radio amplifier system. This system provides a fast, efficient and clean supply to the radio frequency amplifier. The resonant power converter may be implemented with a class E inverter. The resonant power converter may be operated efficiently by switching at zero voltage switching or zero current switching. By operating the resonant switching power converter at the same frequency of the radio frequency amplifier, the spectrum of the power converter is immune from undesired harmonics while meeting the bandwidth requirement. By adaptively tuning the tunable resonant network, the output voltage of the rectifier is controlled to track the envelope signal.Type: ApplicationFiled: November 21, 2015Publication date: March 24, 2016Applicant: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 9214538Abstract: A novel semiconductor power transistor is presented. The semiconductor structure is simple and is based on a FET structure, where multiple channels and multiple gate regions are formed in order to achieve a lower specific on-resistance, and a higher control on the transport properties of the device. No dielectric layer is present between gate electrodes and device channels, decreasing the parasitic capacitance associated with the gate terminal. The fabrication of the device does not require Silicon On Insulator techniques and it is not limited to Silicon semiconductor materials. It can be fabricated as an enhancement or depletion device with much more control on the threshold voltage of the device, and with superior RF performance.Type: GrantFiled: May 16, 2011Date of Patent: December 15, 2015Assignee: ETA Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 9214512Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage minimizing the distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.Type: GrantFiled: August 11, 2014Date of Patent: December 15, 2015Assignee: ETA Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Publication number: 20150194538Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage minimizing the distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.Type: ApplicationFiled: March 22, 2015Publication date: July 9, 2015Applicant: ETA SEMICONDUCTOR INC.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Publication number: 20150179732Abstract: A novel semiconductor transistor is presented. The semiconductor structure has a gate region forming a channel with repetitive patterns in the direction perpendicular to the current flow, so that the portion of its channel that is not strictly planar contributes to a significant reduction of the silicon area occupied by the device. It offers the advantage of lower on-resistance for the same silicon area while improving on its dynamic performances. The additional cost to shape the channel region of the device in periodic repetitive patterns is minimum, which makes the present invention easy to implement in any conventional CMOS process technology and very cost effective.Type: ApplicationFiled: December 24, 2013Publication date: June 25, 2015Applicant: ETA SEMICONDUCTOR.INCInventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8963289Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.Type: GrantFiled: May 7, 2013Date of Patent: February 24, 2015Assignee: ETA Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8907644Abstract: A novel method to synchronize the switching frequency of hysteretic power converters is presented. The method includes the generation of a clock signal and the injection of a periodic disturbance signal operating at the frequency of the generated clock in the main loop of the converter to synchronize the hysteretic power converter to switch at the frequency of the clock. The presented approach provides significant advantages with respect to the more traditional means of utilizing Frequency Lock Loop, Phase Lock Loop or Delay Lock Loop circuits, mainly for its simplicity, faster locking and much reduced phase error. The switching frequency can be higher or lower than the free running frequency of the power converter provided that the free running frequency is close enough to the desired switching frequency. The method is presented for buck and boost hysteretic high frequency switching power converters.Type: GrantFiled: July 14, 2011Date of Patent: December 9, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8835988Abstract: The present invention describes a hybrid integrated circuit comprising both CMOS and III-V devices, monolithically integrated in a single chip. It allows the almost complete elimination of the contamination issues related to the integration of different technologies, maintaining at the same time a good planarization of the structure. It further simplifies the fabrication process, allowing the growth of high quality III-V materials on (100) silicon substrates lowering the manufacturing cost. Moreover, differently from many prior art attempts, it does not require silicon on insulator technologies and/or other expensive process steps. This invention enables the consolidation on the same integrated circuit of a hybrid switching power converter that takes advantage of the established circuit topologies of CMOS circuitries and of the higher mobility and voltage withstanding of III-V HEMT devices.Type: GrantFiled: June 4, 2012Date of Patent: September 16, 2014Assignee: Eta Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8803288Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.Type: GrantFiled: May 7, 2013Date of Patent: August 12, 2014Assignee: Eta Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8803242Abstract: A novel semiconductor transistor is presented. The semiconductor structure has a MOSFET like structure, with the difference that the device channel is formed in an intrinsic region, so as to effectively decrease the impurity and surface scattering phenomena deriving from a high doping profile typical of conventional MOS devices. Due to the presence of the un-doped channel region, the proposed structure greatly reduces Random Doping Fluctuation (RDF) phenomena decreasing the threshold voltage variation between different devices. In order to control the threshold voltage of the device, a heavily doped poly-silicon or metallic gate is used. However, differently from standard CMOS devices, a high work-function metallic material, or a heavily p-doped poly-silicon layer, is used for a n-channel device and a low work-function metallic material, or heavily n-doped poly-silicon layer, is used for a p-channel FET.Type: GrantFiled: September 19, 2011Date of Patent: August 12, 2014Assignee: Eta Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8786269Abstract: A novel method to operate synthetic ripple switching power converters at constant frequency is presented. The method includes the generation of a clock signal and the summing of a ramp signal to a DC voltage reference to be compared to a synthetic ripple signal. The ramp signal is synchronous with the clock signal. A minimum on-time or minimum off-time type of control is implemented. The switching frequency is constant. The presented approach provides significant advantages with respect to the more traditional means of utilizing hysteretic approaches combined with frequency control circuits. The switching frequency can be as high as the one obtained for a hysteretic power converter, the load and line transient response is comparable with or better than the one achieved with hysteretic approaches. The stability is obtained by adapting the slope of the ramp signal in order to obtain the adequate gain of the system.Type: GrantFiled: August 10, 2011Date of Patent: July 22, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8779731Abstract: A novel switching hysteretic power converter is presented. The converter includes the generation of a synthetic ripple signal and a feedback network to combine a signal in phase with the inductor current with a signal proportional to the regulated output voltage. The presented approach provides a switching boost converter with a much simpler control method with respect to conventional inductive boost power converters. The hysteretic control provides stable operation in all conditions with excellent load and line transient response. Furthermore the hysteretic control allows high frequency switching, reducing the size and cost of the passive components. The presented converter includes the Discontinuous Conduction Mode of operation to achieve very high efficiency at light loads. The presented approach can also be applied to buck switching power converters with excellent performance in terms of transient response, stability, efficiency and operation at high switching frequencies.Type: GrantFiled: January 10, 2011Date of Patent: July 15, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8773102Abstract: A novel switching hysteretic power converter is presented. The power converter combines the function of a capacitive charge pump with the function of an inductive step down converter to obtain a switching boost converter with a much simpler control method with respect to conventional inductive boost power converters. The hysteretic control provides stable operation in all conditions with excellent load transient response. Furthermore the hysteretic control allows high frequency switching reducing the size and cost of the passive components. The Discontinuous Conduction Mode of operation provides very high efficiency even at light loads. The presented power converter can be operated as a boost converter or as a buck converter simply by changing the switching phase of one switch. In both types of operation the efficiency of the hysteretic power converter can be quite high even at high switching frequencies.Type: GrantFiled: January 3, 2011Date of Patent: July 8, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8773088Abstract: A novel method to operate and control single inductor multiple output switching power converter is presented. The method includes the means for generating one or more synthetic ripple signals and operating the converter at constant switching frequency allowing high frequency operation, maintaining stability in all conditions with minimum cross regulation between the outputs independently on the levels of load present at the outputs. The method further includes means for setting the maximum frequency of multiplexing the energy stored in the inductor between the various outputs reaching the desired compromise between the value of the output capacitors, the switching frequency of the output power devices and the acceptable output voltage ripple. Two different topologies are proposed that can be used for single inductor multiple output buck power converters and for boost power converter allowing the extension to buck-boost configurations as well.Type: GrantFiled: December 21, 2011Date of Patent: July 8, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8669591Abstract: The present invention describes a transistor based on a Hetero junction FET structure, where the metal gate has been replaced by a stack formed by a highly doped compound semiconductor and an insulating layer in order to achieve enhancement mode operation and at the same time drastically reduce the gate current leakage. The combination of the insulating layer with a highly doped semiconductor allows the tuning of the threshold voltage of the device at the desired value by simply changing the composition of the semiconductor layer forming the gate region and/or its doping allowing a higher degree of freedom. In one of the embodiment, a back-barrier layer and a heavily doped threshold tuning layer are used to suppress Short Channel Effect phenomena and to adjust the threshold voltage of the device at the desired value. The present invention can be realized both with polar and non-polar (or semi-polar) materials.Type: GrantFiled: December 27, 2011Date of Patent: March 11, 2014Assignee: Eta Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8629668Abstract: A novel method to operate synthetic ripple multi-phase switching power converters at constant frequency is presented. The method includes the means for sensing the current in each phase without adding extra dissipation and for balancing the currents by affecting the synthetic ripple signal to modulate the duty cycle without disturbing the overall output voltage regulation. Furthermore a method for obtaining optimum load transient response is presented. The method includes the means for simply determining the derivative of the synthetic ripple signal and for forcing maximum duty cycle until the derivative of the synthetic ripple signal reaches a certain threshold. A variant of this method improves further the load transient response by coupling an RC network to the ramp signal generated to modulate the duty cycle so as to maintain the maximum duty cycle a bit longer after the derivative of the synthetic ripple signal has reached the zero value.Type: GrantFiled: September 19, 2011Date of Patent: January 14, 2014Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8498094Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a linear dependence of the capacitance value with respect to the voltage of its control terminal.Type: GrantFiled: May 5, 2011Date of Patent: July 30, 2013Assignee: ETA Semiconductor Inc.Inventors: Fabio Alessio Marino, Paolo Menegoli
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Patent number: 8441770Abstract: A novel inductive overvoltage suppression circuit for power converters is presented. High amplitude voltage spikes are generally occurring in high frequency power converters in presence of small parasitic inductances coupled to the power distribution rails, in correspondence of the switching transitions, particularly when high load currents are required. The presented invention proposes active clamps to limit the amplitude of the overvoltage. Furthermore the excess energy in the parasitic inductances is utilized to provide energy and/or a signal to determine when to turn on the next phase power device with the fastest transition possible without incurring in cross-conduction currents in the power stage of the converter, thus improving its overall performance, and circuit reliability in addition to achieving high conversion efficiency.Type: GrantFiled: February 18, 2011Date of Patent: May 14, 2013Assignee: ETA Semiconductor IncInventors: Paolo Menegoli, Fabio Alessio Marino
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Patent number: 8441231Abstract: A novel switching hysteretic bidirectional power converter is presented. The converter includes the generation of a synthetic ripple signal and feedback networks to hysteretically control the power converter both when the converter operates as a boost converter with the flow of power in one direction, and when the converter operates as a buck power converter with the flow of power in the opposite direction. The presented approach provides a switching converter with a much simpler control method with respect to conventional inductive bidirectional power converters. The hysteretic control provides stable operation in all conditions with excellent load and line transient response. Furthermore this allows the operation of the bidirectional power converter with much higher switching frequencies with respect to state of the art conventional approaches, thus reducing the cost and size of the passive components storing energy during the conversion.Type: GrantFiled: May 27, 2011Date of Patent: May 14, 2013Assignee: ETA Semiconductor Inc.Inventors: Paolo Menegoli, Fabio Alessio Marino