Patents Assigned to Eupec Europaische Gesellschaft fur Leistungshalbleiter mbH
  • Patent number: 7279963
    Abstract: A semiconductor device has first, second, and third connecting leads (1, 2, 3), whose respective base points (1f, 2f, 3f) have centroids (1m, 2m, 3m). The connecting leads are arranged wherein an angle (?) between a first line drawn between the centroids (1m, 3m) of the base points (1f, 3f) of first lead (1) and third lead (3) and a second line drawn between the centroids (2m, 3m) of the base points (2f, 3f) of second lead (2) and third lead (3) is 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: October 9, 2007
    Assignee: eupec Europäische Gesellschaft für Leistungshalbleiter mbH
    Inventors: Thomas Passe, Oliver Schilling
  • Patent number: 7212063
    Abstract: A half-bridge circuit, in which an input signal that is applied between two input terminals can be picked up at a phase output comprises two switching transistors controlled by a respective control signal that is applied between a control electrode and an auxiliary electrode and two diodes. The first input terminal is connected to the first electrode of the first switching transistor and to the first diode's cathode. A second electrode of the first switching transistor is connected to the first diode's anode by means of the phase output, via a line, to a first electrode of the second switching transistor and to a cathode of the second diode. A second electrode of the second switching transistor is connected to an anode of the second diode and to the second input terminal. The auxiliary electrode of the first switching transistor is connected to the line of the phase output.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 1, 2007
    Assignee: Eupec Europaische Gesellschaft fur Leistungshalbleiter mbH Max-Planck-Str. 5
    Inventors: Mark Nils Münzer, Roman Lennart Tschirbs
  • Patent number: 7147520
    Abstract: A connection part has a plastic body (1) and at least one electrical connection element (4, 5) having a fixing region (4a, 5a) which is injection molded into the plastic body (1), and having a connection lug (4b, 5b) which has a cutout (12, 13) for a screw connecting element. A corresponding connecting element (8, 9) can be introduced into a receiving area (2, 3) beneath the connection lug (4b, 5b). At least one latching element (10, 11; 14, 15) holds the corresponding connecting element (8, 9) in the receiving area (2, 3) such that it cannot fall out once it has been inserted. A connection part is thus created which has a securely and permanently fixed connection element with cost-effective production and, at the same time, makes it possible to compensate for the tolerance with respect to a contact element to be mounted externally.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: December 12, 2006
    Assignee: Eupec Europaische Gesellschaft fur Leistungshalbleiter mbH
    Inventor: Klaus Lokietz
  • Publication number: 20060261133
    Abstract: A method and a device is provided for levelling an area region on the surface of a metal or metallization layer of a carrier. The area region is made planar by the action of a stamp or of a roller.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 23, 2006
    Applicant: eupec Europaische Gesellschaft fur Leistungshalbleiter mbH
    Inventors: Reinhold Bayerer, Thomas Licht, Alfred Kemper
  • Patent number: 6693327
    Abstract: A lateral semiconductor element (10) in thin-film SOI technology comprises an insulator layer (14) which rests on a substrate (12) and is buried under a thin silicon film (16), on top of which the source, or anode, contact (18) and the drain, or cathode, contact (22) are mounted. The anode contact (18) and the cathode contact (22) each lie over separate shield regions (28,30) within substrate (12), with the anode contact (18) being electrically connected with substrate (12).
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: February 17, 2004
    Assignee: EUPEC Europaische Gesellschaft fur Leistungshalbleiter mbH
    Inventors: Dirk Priefert, Ralf Rudolf, Viktor Boguszewicz, Frank Michalzik, Rolf Buckhorst
  • Patent number: 5063428
    Abstract: A semiconductor element having a p-zone on the anode side and an adjacent weakly doped n-zone which forms a blocking pn-junction with the p-zone, particularly a fast rectifier diode and a fast thyristor. To realize improved recovery behavior during commutation and good forward conduction and blocking characteristics in such components, the semiconductor element is configured in such a manner that the p-zone on the anode side includes an electron sink formed by a pn-junction formed of this zone and the adjacent n-zone; moreover, the thickness and the doping concentration of the region of the anode-side p-zone between the electron sink (S) and the pn-junction are selected in such a manner that the region of high injected charge carrier concentration under forward load extends close to the electron sink while, under a forward blocking load, the space charge zone in the p-zone does not extend to the electron sink.
    Type: Grant
    Filed: June 10, 1988
    Date of Patent: November 5, 1991
    Assignee: eupec Europaische Gesellschaft fur Leistungshalbleiter mbH & Co. KG
    Inventors: Heinrich Schlangenotto, Karl H. Sommer