Patents Assigned to Fijitsu Quantum Devices Limited
  • Patent number: 6249188
    Abstract: Provided are a phase comparator (BBD) 10 for generating a pulse of a signal UP0 or DOWN0 depending on lead or lag of the falling edge of a clock recovered from DATA, relative to the edge of DATA, an overrun detector circuit 20 activating an overrun signal OVR while the circuit 20 detects that lead or lag of the falling edge of the clock exceeds &pgr;/2, a state latch circuit 30 latching a state of either a signal UP0 or DOWN0 being active before the signal OVR transits active, and a selection circuit 40 outputting the signals UP0 and DOWN0 as signals UP and DOWN while the signal OVR is inactive, and outputting the signals UP0 and DOWN0 as the signals DOWN and UP while the signal OVR is active.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: June 19, 2001
    Assignee: Fijitsu Quantum Devices Limited
    Inventor: Yoshiaki Kaneko
  • Patent number: 5473175
    Abstract: A high electron mobility field effect semiconductor device includes a layer stack including electron supply layers and electron transport layers to form a plurality of hetero-junctions so as to provide 2DEG layers in hetero-interfaces on the electron transport layer side, a source electrode and a drain electrode disposed with an interval on a surface of the layer stack to oppose each other and to be conductive to the 2DEG layers, and a gate electrode extending between the source and drain electrodes to develop a Schottky contact with the upper-most carrier supply layer. The electron supply layer remote from the gate electrode has an electron density higher than that of the electron supply layer less remote from the gate electrode.
    Type: Grant
    Filed: September 2, 1993
    Date of Patent: December 5, 1995
    Assignees: Fujitsu Limited, Fijitsu Quantum Devices Limited
    Inventors: Jun-Ichiro Nikaido, Yutaka Minimo