Abstract: A integrated camera module (10, 10a) for capturing video images in very small digital cameras, cell phones, personal digital assistants, and the like. A lens assembly (24, 24a) is rigidly affixed in relation to a sensor array area (14) of a camera chip (12) by a molding (26). The molding (26) is formed on the camera chip (12), and optionally on a printed circuit board (16, 16a) on which the camera chip (12) is mounted. The lens assembly (24, 24a) is held in place in a recess (29) of the molding (26) by an adhesive (28). The molding (26) is formed such that a precise gap (30) exists between the lens assembly (24) and a sensor array area (14) of the camera chip (12).

Abstract: A semiconductor device having multiple lateral channels with contacts on opposing surfaces thereof and a method of forming the same. In one embodiment, the semiconductor device includes a conductive substrate having a first contact covering a substantial portion of a bottom surface thereof. The semiconductor device also includes a first lateral channel above the conductive substrate and a second lateral channel above the first lateral channel. The semiconductor device further includes a second contact above the second lateral channel. The semiconductor device still further includes an interconnect that connects the first and second lateral channels to the conductive substrate operable to provide a low resistance coupling between the first contact and the first and second lateral channels.

Abstract: A novel integrated computer includes a support base, a computer component pivotally coupled to the support base, and a display component slidably coupled to the computer component. The pivotal connection between the support base and the computer component facilitates adjustment of the tilt of the display. The slidable connection between the computer component and the display component facilitates height adjustment of the display, without affecting the tilt of the display. A biasing member prevents unwanted movement of the display, while allowing adjustment of the display. A method for manufacturing the integrated computer is also disclosed.

Abstract: A digital camera module includes an image capture device mounted on a flexible circuit substrate. In one embodiment of the digital camera module, the image capture device is mounted directly (e.g., by an adhesive) on the flexible circuit substrate. A stiffener (e.g., a piece of circuit board material) is mounted to the back of the flexible circuit substrate to support wire bonding of the image capture device onto the flexible circuit substrate and/or to support the mounting of additional components (e.g., a lens housing).

Abstract: A method for designing an electronic component includes receiving a device criteria (e.g., a parametric value, procurement value, etc.) from a designer, querying a database for devices corresponding to the device criteria, querying the database for procurement data and/or engineering data associated with the corresponding devices, presenting the devices to the designer based on the procurement data, and receiving input from the designer identifying one of the presented devices as a selected device. In a particular method, the returned devices are sorted based on one or more procurement values (e.g., manufacturer, price, availability, manufacturer status, etc.), and presented to the designer in a ranked list. Objects representative of the selected devices are then entered into a design file, and the objects are associated with the device's engineering and/or procurement data. In a particular embodiment, the objects are associated with the engineering data by embedding the engineering data in the file object.

Abstract: A digital camera module includes an image capture device, a lens unit, a housing for receiving the lens unit and positioning the lens unit with respect to the image capture device, and a focus mechanism disposed on the outside of the housing and operative to move the lens unit along an axis when the lens unit is rotated about the axis. In one embodiment, the focus mechanism includes a ramp formed on the housing and a complementary ramp formed on the lens unit. In another embodiment, the focus mechanism includes a thread set formed on the outside of the housing for engaging a complementary thread set on a sleeve of the lens unit. In still another embodiment, the focus mechanism includes an inclined groove and a groove follower. The external adjustment mechanism prevents the image capture device from being contaminated by particulates generated during focusing.

Abstract: A semiconductor device and method of forming the same. The semiconductor device includes an epitaxially grown and conductive buffer layer having a contact covering a substantial portion of a bottom surface thereof and a lateral channel above the buffer layer. The semiconductor device also includes another contact above the lateral channel and an interconnect that connects the lateral channel to the buffer layer, operable to provide a low resistance coupling between the contact and the lateral channel.

Abstract: A power system having a power converter with an adaptive controller. The power system is coupled to a load and includes a power system controller that receives a signal indicating a system operational state of the load and selects a power converter operational state as a function thereof. The power system also includes a power converter with a power switch that conducts for a duty cycle to provide a regulated output characteristic at an output thereof. The power converter also includes a controller that receives a command from the power system controller to enter the power converter operational state and provides a signal to control the duty cycle of the power switch as a function of the output characteristic and in accordance with the command, thereby regulating an internal operating characteristic of the power converter to improve an operating efficiency thereof as a function of the system operational state.

Abstract: A controller for a power converter, and method of operating the same. The controller improves power converter operating efficiency by regulating an internal power converter operating characteristic depending on a value of a power converter parameter measured after a manufacturing step, or an environmental parameter, preferably employing a table with entries dependent on the parameter value. The internal operating characteristic may be an internal bus voltage, a voltage level of a drive signal for a power switch, a number of paralleled power switches selectively enabled to conduct, or a basic switching frequency of the power converter. The controller may regulate an internal operating characteristic of the power converter using a functional relationship dependent on the parameter value. The environmental parameter may be received as a signal from an external source. The parameter measured after a manufacturing step may be a parameter measured from representative power converter(s).

Abstract: A power converter having input and output nodes and a method of operating the same. In one embodiment, the power converter includes a switching circuit including first, second and third active phase legs. Each of the first, second and third active legs includes a first switch coupled to one of the input nodes and a second switch coupled to another of the input nodes and has a common switching node therebetween. The power converter further includes a magnetic device including first, second and third primary windings, and first, second and third secondary windings. The first, second and third primary windings are coupled to the common switching node of the first, second and third active phase legs, respectively. The power converter still further includes a rectifier including first, second and third rectifier elements interposed between the first, second and third secondary windings, respectively, and one of the output nodes.

Abstract: A power system having a power converter with an adaptive controller. In one embodiment, a power converter coupled to a load includes a power switch configured to conduct for a duty cycle to provide an output characteristic at an output thereof. The power converter also includes a power converter controller configured to receive a signal from the load indicating a system operational state of the load and enable a power converter topological state as a function of the signal.

Abstract: A semiconductor device, a method of forming the same, and a power converter including the semiconductor device. In one embodiment, the semiconductor device includes a heavily doped substrate, a source/drain contact below the heavily doped substrate, and a channel layer above the heavily doped substrate. The semiconductor device also includes a heavily doped source/drain layer above the channel layer and another source/drain contact above the heavily doped source/drain layer. The semiconductor device further includes pillar regions through the another source/drain contact, the heavily doped source/drain layer, and portions of the channel layer to form a vertical cell therebetween. Non-conductive regions of the semiconductor device are located in the portions of the channel layer within the pillar regions. The semiconductor device still further includes a gate above the non-conductive regions in the pillar regions.

Abstract: A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

Abstract: A semiconductor device including a substrate-driven field-effect transistor with a lateral channel and a parallel-coupled Schottky diode, and a method of forming the same. In one embodiment, the substrate-driven field-effect transistor of the semiconductor device includes a conductive substrate having a first contact covering a substantial portion of a bottom surface thereof, and a lateral channel above the conductive substrate. The substrate-driven field-effect transistor also includes a second contact above the lateral channel and an interconnect that connects the lateral channel to the conductive substrate operable to provide a low resistance coupling between the first contact and the lateral channel. The semiconductor device also includes a Schottky diode parallel-coupled to the substrate-driven field-effect transistor. A first and second terminal of the Schottky diode are couplable to the first and second contacts, respectively, of the substrate drive field-effect transistor.

Abstract: A matrix integrated magnetics (MIM) “Extended E” core in which a plurality of outer legs are disposed on a base and separated along a first outer edge to define windows therebetween. A center leg is disposed on the top region of the base and separated from the outer legs to define a center window. The center leg is suitably positioned along a second outer edge opposite the first or between outer legs positioned along opposing outer edges. A plate is disposed on the outer legs opposite the base.

Abstract: A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

Abstract: A vertical winding structure for planar integrated magnetics used in switched-mode power converters maintains close coupling between the different windings but reduces the eddy current losses, lowers the DC winding resistance and reduces the number of layers of the PCB. Vertical and horizontal windings can be used together without sacrificing these performance advantages and further minimizing the capacitive coupling between the outer-leg windings and the center-leg winding. This winding structure can be used in a wide range of magnetic structures including isolated and non-isolated CDRs, interleaved CDRs, and buck and boost converters.

Abstract: A semiconductor device, a method of forming the same, and a power converter including the semiconductor device. In one embodiment, the semiconductor device includes a heavily doped substrate, a source/drain contact below the heavily doped substrate, and a channel layer above the heavily doped substrate. The semiconductor device also includes a heavily doped source/drain layer above the channel layer and another source/drain contact above the heavily doped source/drain layer. The semiconductor device further includes pillar regions through the another source/drain contact, the heavily doped source/drain layer, and portions of the channel layer to form a vertical cell therebetween. Non-conductive regions of the semiconductor device are located in the portions of the channel layer within the pillar regions. The semiconductor device still further includes a gate above the non-conductive regions in the pillar regions.

Abstract: A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

Abstract: There is provided an isolated power converter. More particularly, in one embodiment, there is provided a power converter including a first magnetic core having a primary winding and a secondary winding around the first magnetic core. The power converter also includes a second magnetic core having a first leg, a second leg coupled to the first leg, and a third leg coupled to the first and second legs, wherein a part of the third leg is equidistant from the first leg and the second leg. The power converter also has a first winding encircling the first leg, a first end of the first winding coupled to the secondary winding, a second winding encircling the second leg, a first end of the second winding coupled to the secondary winding, and a third winding encircling the third leg, a first end of the third winding coupled to a second end of the first wining and to a second end of the second winding.