Patents Assigned to Force Mos Technology Co., Ltd.
  • TRENCH MOSFET HAVING A TOP SIDE DRAIN
    Publication number: 20130207172
    Abstract: This invention discloses a trench MOSFET comprising a top side drain region in a wide trench in a termination area besides a BV sustaining area, wherein said top side drain comprises a top drain metal connected to an epitaxial layer and a substrate through a plurality of trenched drain contacts, wherein the wide trench is formed simultaneously when a plurality of gate trenches are formed in an active area, and the trenched drain contacts are formed simultaneously when a trenched source-body contact is formed in the active area.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • Trench MOSFET layout with trenched floating gates and trenched channel stop gates in termination
    Patent number: 8487372
    Abstract: A trench MOSFET layout with multiple trenched floating gates and at least one trenched channel stop gate in termination area shorted with drain region is disclosed to make it feasibly achieved after die sawing. The layout consisted of dual trench MOSFETs connected together with multiple sawing trenched gates across a space between the two trench MOSFETs having a width same as scribe line.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 16, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • TRENCH MOSFET WITH RESURF STEPPED OXIDE AND DIFFUSED DRIFT REGION
    Publication number: 20130168760
    Abstract: A trench MOSFET with split gates and diffused drift region for on-resistance reduction is disclosed. Each of the split gates is symmetrically disposed in the middle of the source electrode and adjacent trench sidewall of a deep trench. The inventive structure can save a mask for definition of the location of the split gate electrodes. Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICE HAVING WIDE TERMINATION TRENCH AND SELF-ALIGNED SOURCE REGIONS FOR MASK SAVING
    Publication number: 20130168731
    Abstract: A trench semiconductor power device with a termination area structure is disclosed. The termination area structure comprises a wide trench and a trenched field plate formed not only along trench sidewall but also on trench bottom of the wide trench by doing poly-silicon CMP so that the body ion implantation is blocked by the trenched field plate on the trench bottom to prevent the termination area underneath the wide trench from being implanted. Moreover, a contact mask is used to define both trenched contacts and source regions of the device for saving a source mask.
    Type: Application
    Filed: November 7, 2012
    Publication date: July 4, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: FORCE MOS TECHNOLOGY CO., LTD.
  • Semiconductor power device integrated with improved gate source ESD clamp diodes
    Patent number: 8466514
    Abstract: A trench semiconductor power device integrated with four types of ESD clamp diodes for optimization of total perimeter of the ESD clamp diodes, wherein the ESD clamp diodes comprise multiple back to back Zener diodes with alternating doped regions of a first conductivity type next to a second conductivity type, wherein each of the doped regions has a closed ring structure.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 18, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Integrated trench MOSFET with trench Schottky rectifier
    Patent number: 8426913
    Abstract: An integrated circuit comprising trench MOSFET having trenched source-body contacts and trench Schottky rectifier having trenched anode contacts is disclosed. By employing the trenched contacts in trench MOSFET and trench Schottky rectifier, the integrated circuit is able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low Vf and reverse leakage current for trench Schottky Rectifier.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • A SEMICONDUCTOR POWER DEVICE INTEGRATRED WITH IMPROVED GATE SOURCE ESD CLAMP DIODES
    Publication number: 20130092976
    Abstract: A trench semiconductor power device integrated with four types of ESD clamp diodes for optimization of total perimeter of the ESD clamp diodes, wherein the ESD clamp diodes comprise multiple back to back Zener diodes with alternating doped regions of a first conductivity type next to a second conductivity type, wherein each of the doped regions has a closed ring structure.
    Type: Application
    Filed: October 17, 2011
    Publication date: April 18, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICE WITH EMBEDDED DIODES AND RESISTORS USING REDUCED MASK PROCESSES
    Publication number: 20130075809
    Abstract: A trench semiconductor power device integrated with a Gate-Source and a Gate-Drain clamp diodes without using source mask is disclosed, wherein a plurality source regions of a first conductivity type of the trench semiconductor device and multiple doped regions of the first conductivity type of the clamp diodes are formed simultaneously through contact open areas defined by a contact mask.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICES INTEGRATED WITH A TRENCHED CLAMP DIODE
    Publication number: 20130075810
    Abstract: A semiconductor power device having shielded gate structure integrated with a trenched clamp diode formed in a semiconductor silicon layer, wherein the shielded gate structure comprises a shielded electrode formed by a first poly-silicon layer and a gate electrode formed by a second poly-silicon layer. The trenched clamp diode is formed by the first poly-silicon layer. A shielded gate mask used to define the shielded gate is also used to define the trenched clamp diode. Therefore, one poly-silicon layer and a mask for the trenched clamp diode are saved.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Power semiconductor device comprising a plurality of trench IGBTs
    Patent number: 8384194
    Abstract: A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: February 26, 2013
    Assignee: Force MOS Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with body region having concave-arc shape
    Patent number: 8378392
    Abstract: A trench Metal Oxide Semiconductor Field Effect Transistor with improved body region structures is disclosed. By forming the inventive body region structures with concave-arc shape with respect to epitaxial layer, a wider interfaced area between the body region and the epitaxial layer is achieved, thus increasing capacitance between drain and source Cds. Moreover, the invention further comprises a Cds enhancement doped region interfaced with said body region having higher doping concentration than the epitaxial layer to further enhancing Cds without significantly impact breakdown voltage.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: February 19, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Super-junction trench MOSFET with resurf stepped oxides and trenched contacts
    Patent number: 8373224
    Abstract: A super-junction trench MOSFET with Resurf Stepped Oxide and trenched contacts is disclosed. The inventive structure can apply additional freedom for better optimization and manufacturing capability by tuning thick oxide thickness to minimize influence of charge imbalance, trapped charges, etc. . . . Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Method for manufacturing a super-junction trench MOSFET with resurf stepped oxides and trenched contacts
    Patent number: 8372717
    Abstract: A method of manufacturing a super junction semiconductor device having resurf stepped oxide structure is disclosed by providing semiconductor silicon layer having trenches and mesas. A plurality of first doped column regions of a second conductivity type in parallel surrounded with second doped column regions of a first conductivity type adjacent to sidewalls of the trenches are formed by angle ion implantations into a plurality of mesas through opening regions in a block layer covering both the mesas and a termination area.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Super-junction trench MOSFET with Resurf stepped oxides and split gate electrodes
    Patent number: 8373225
    Abstract: A super-junction trench MOSFET with Resurf Stepped Oxide and split gate electrodes is disclosed. The inventive structure can apply additional freedom for better optimization of device performance and manufacturing capability by tuning thick oxide thickness to minimize influence of charge imbalance, trapped charges, etc. Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • MOSFET-SCHOTTKY RECTIFIER-DIODE INTEGRATED CIRCUITS WITH TRENCH CONTACT STRUCTURES
    Publication number: 20130020577
    Abstract: A trench MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source clamp diodes on single chip is formed to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for Gate-Source clamp diode and avalanche protection for Gate-Drain clamp diode.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • SHIELDED GATE MOSFET-SCHOTTKY RECTIFIER-DIODE INTEGRATED CIRCUITS WITH TRENCHED CONTACT STRUCTURES
    Publication number: 20130020576
    Abstract: A trench shielded gate MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source clamp diodes on single chip is formed to achieve device shrinkage, lower cost and improved performance. The present semiconductor device achieve low Vf and reverse leakage current for embedded Schottky rectifier, having over-voltage protection and avalanche protection between gate and source and between gate and drain.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • FAST SWITCHING HYBRID IGBT DEVICE WITH TRENCHED CONTACTS
    Publication number: 20120313141
    Abstract: A hybrid IGBT device having a VIGBT and LDMOS structures comprises at least a drain trenched contact filled with a conductive plug penetrating through an epitaxial layer, and extending into a substrate; a vertical drain region surrounding at least sidewalls of the drain trenched contact, extending from top surface of the epitaxial layer to the substrate, wherein the vertical drain region having a higher doping concentration than the epitaxial layer.
    Type: Application
    Filed: August 21, 2012
    Publication date: December 13, 2012
    Applicant: Force Mos Technology Co. Ltd.
    Inventor: Fu-Yuan HSIEH
  • POWER SEMICONDUCTOR DEVICE COMPRISING A PLURALITY OF TRENCH IGBTS
    Publication number: 20120305985
    Abstract: A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 6, 2012
    Applicant: Force Mos Technology Co. Ltd.
    Inventor: Fu-Yuan HSIEH
  • METHOD FOR MANUFACTURING A POWER SEMICONDUCTOR DEVICE
    Publication number: 20120309148
    Abstract: A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 6, 2012
    Applicant: Force Mos Technology Co. Ltd.
    Inventor: Fu-Yuan HSIEH
  • HIGH SWITCHING TRENCH MOSFET
    Publication number: 20120292694
    Abstract: A shielded gate trench metal oxide semiconductor filed effect transistor (MOSFET) having high switching speed is disclosed. The inventive shielded gate trench MOSFET includes a shielded electrode spreading resistance placed between a shielded gate electrode and a source metal to enhance the performance of the shielded gate trench MOSFET by adjusting doping concentration of poly-silicon in gate trenches to a target value. Furthermore, high cell density is achieved by employing the inventive shielded gate trench MOSFET without requirement of additional cost.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH