Patents Assigned to Force10 Networks, Inc.
  • Publication number: 20120087372
    Abstract: A network switch suitable for receiving packets of information from and the packets of information to a communications network includes a plurality of physical ports, packet processing functionality and memory. The packet processing functionality operates on information stored in memory to determine the LAG, from among two or more LAGs, over which a packet received by the switch should be correctly forwarded. The switch memory stores a plurality of LAG tables, each one of which can include one or more entries comprising a physical port number and a packet parameter that are used by the packet processing functionality to determinately identify the correct LAG over which to forward a packet.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 12, 2012
    Applicant: Force 10 Networks, Inc.
    Inventor: Janardhanan P. Narasimhan
  • Patent number: 8149690
    Abstract: A link-state protocol running on a router requires that an adjacent neighbor router in the same network maintain a synchronized link state database in order to form the adjacency. Should the neighbor request link state information that the router does not possess, normally the adjacency is broken, causing a restart and network instability. The described embodiments allow adjacencies to form and be maintained even when the neighbor makes at least some types of “bad” requests for link state information. Embodiments that operate with and without the knowledge and cooperation of the neighbor are described.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: April 3, 2012
    Assignee: Force10 Networks, Inc.
    Inventor: Nitin Kakkar
  • Publication number: 20120063299
    Abstract: A virtual chassis includes two or more physical chassis and operates as a single, logical device. Each of the two or more physical chassis include two route processor modules (RPM) and each RPM is assigned a first and a second role within the virtual chassis. The first role is a physical chassis level role and the second role is a virtual chassis level role. The RPMs operate in coordination such that the failure of any one of the RPMs results in one or more other RPMs taking over the first and second roles of the failed RPM.
    Type: Application
    Filed: September 14, 2010
    Publication date: March 15, 2012
    Applicant: Force10 Networks, Inc.
    Inventors: Janardhanan P. Narasimhan, Sanjeev Agrawal, Purushothaman Nandakumaran, Joyas Joseph
  • Patent number: 8119921
    Abstract: The characteristic impedance of a surface pad is manipulated by reticulating the pad and filling the spaces with a dielectric material, providing an inductive element in the coupling of the surface pad to an underlying ground pad of a ground plane, or a combination of these approaches. In appropriate embodiments, acceptable signal trace routing paths will exist in an embedded signal layer under the ground plane and crossing under the surface pad. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: February 21, 2012
    Assignee: Force10 Networks, Inc.
    Inventors: Joel R. Goergen, Greg Hunt, Peter Tomaszewski, Joseph Pankow, Michael Laudon
  • Patent number: 8121205
    Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: February 21, 2012
    Assignee: Force10 Networks, Inc.
    Inventors: Yi Zheng, Joel R. Goergen
  • Publication number: 20120039335
    Abstract: A stacked chassis comprising multiple physical switch/router chassis operates without any special stacking hardware or stacking channels. Instead, a stacking LAG is installed between front-end switch ports on the stacked chassis. The chassis controllers negotiate a master, which controls operation of all chassis in the stack. A stacked-chassis-wide port numbering scheme is used to distribute information to all line cards in the system. Each line card processes the information to distill physical-chassis significant information for operation of that chassis in the stack.
    Type: Application
    Filed: August 13, 2010
    Publication date: February 16, 2012
    Applicant: Force10 Networks. Inc.
    Inventors: Krishnamurthy Subramanian, Raja Jayakumar, Janardhanan P. Narasimhan
  • Publication number: 20120033760
    Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.
    Type: Application
    Filed: October 13, 2011
    Publication date: February 9, 2012
    Applicant: Force10 Networks, Inc.
    Inventors: Yi Zheng, Joel R. Goergen
  • Publication number: 20120020373
    Abstract: A stacked chassis comprising multiple physical switch/router chassis operates without any special stacking hardware or stacking channels. Instead, a stacking LAG is installed between front-end switch ports on the stacked chassis. The chassis controllers negotiate a master, which controls operation of all chassis in the stack. A stacked-chassis-wide port numbering scheme is used to distribute information to all line cards in the system. Each line card processes the information to distill physical-chassis significant information for operation of that chassis in the stack.
    Type: Application
    Filed: July 20, 2010
    Publication date: January 26, 2012
    Applicant: Force10 Networks, Inc.
    Inventors: KRISHNAMURTHY SUBRAMANIAN, Raja Jayakumar, Janardhanan . P Narasimhan
  • Publication number: 20120020364
    Abstract: A BGP capable packet network device is located at the boundary of an autonomous network and in communication with a peer BGP capable packet network device in a neighboring autonomous network. The BGP capable packet network device is comprised of one or more line cards for receiving and, processing and sending packets of information, and for receiving and forwarding routing update information to a route processor comprising the packet network device. The route processor runs a border gateway protocol which is configured with one or more policies that operate to filter the routing update information received from the line card. The routing update information filter is comprised of at least one variable length path attribute and the filter operates such that it only applies the variable length path attribute one time to the routing update information.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 26, 2012
    Applicant: Force10 Networks, Inc.
    Inventors: KALPESH ZINJUWADIA, Srikanth Rao
  • Patent number: 8102848
    Abstract: During initial formation of an adjacency, two neighboring PIM speakers exchange, in their hello messages, information as to whether each supports a non-stop forwarding (NSF) capability. When one of the PIM speakers restarts, the PIM neighbor senses this event, and responds by immediately forwarding its entire relevant Tree Information Base (TIB) to the restarting PIM speaker, followed by an End Of TIB (EOTIB) marker. Once the restarting PIM speaker has received TIB contents and EOTIB markers from each of its PIM neighbors, it can immediately finalize its multicast routes. In a group of routers participating in this non-stop forwarding capability, it may be possible to significantly reduce the configuration delay time currently required before purging stale multicast entries from the line card forwarding tables. Other embodiments are also described and claimed.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: January 24, 2012
    Assignee: Force10 Networks, Inc.
    Inventor: Srikanth Rao
  • Publication number: 20120002670
    Abstract: A stacked chassis comprising multiple physical switch/router chassis operates without any special stacking hardware or stacking channels. Instead, a stacking LAG is installed between front-end switch ports on the stacked chassis. The chassis controllers negotiate a master, which controls operation of all chassis in the stack. A stacked-chassis-wide port numbering scheme is used to distribute information to all line cards in the system. Each line card processes the information to distill physical-chassis significant information for operation of that chassis in the stack.
    Type: Application
    Filed: July 1, 2010
    Publication date: January 5, 2012
    Applicant: Force 10 Networks, Inc.
    Inventors: KRISHNAMURTHY SUBRAMANIAN, RAJA JAYAKUMAR, JANARDHANAN P. NARASIMHAN
  • Patent number: 8077473
    Abstract: A lever assembly for use with electronic modules has a handle lever with a self-sprung cantilevered handle section. The cantilevered handle section can be flexed with respect to the non-cantilevered portion of the handle lever during module insertion to automatically engage a catch that prevents the handle lever from inadvertently or accidentally being released and unseating the module. Once the flexing force is removed, compression of the handle section remains at the catch, such that the handle section continues to apply leverage force in the closure direction to hold the module securely in place.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: December 13, 2011
    Assignee: Force10 Networks, Inc.
    Inventor: Donald Lewis
  • Publication number: 20110283108
    Abstract: A trusted relationship service includes a certificate authentication server and a secure file host. The certificate authentication server operates to receive requests from a supplier and a customer to register with the service, verifies the identities of the supplier and the customer and sends digital certificates to both the supplier and the customer. The supplier can send information to the trusted relationship service where it is posted in a secure file host. The supplier can solicit the customer to visit the trusted relationship service web site to view the supplier information stored there, whereupon the customer can use their digital certificate to access the trusted relationship service site and is granted permission by the site to view the supplier information.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 17, 2011
    Applicant: Force10 Networks, Inc.
    Inventor: Bruce D. Miller
  • Publication number: 20110235545
    Abstract: An autonomous system includes at least some packet network devices that are capable of operating in a virtual route aggregation environment and some packet network devices that are not capable of operating in a virtual route aggregation environment. The autonomous system includes at least one egress border router, at least one aggregation router and at least one intermediate router. The egress border router uses an interior border gateway protocol to distribute a label message to the other routers in the autonomous system, the label message including a next hop MAC address associated with either an external router or the egress border router. The egress border router and the intermediate router using information included in the label message to contrast layer 2 table entries and the aggregation router using information included in the label message to construct a layer 3 table entry.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 29, 2011
    Applicant: Force 10 Networks, Inc.
    Inventors: KRISHNAMURTHY SUBRAMANIAN, SHIVI FOTEDAR, JANARDHNAN NARASIMHAN
  • Patent number: 8027256
    Abstract: In one embodiment of a network device, multiple packet sources contend for access to a packet processing pipeline. The packet processing pipeline tracks the usage of lookup resources by each of the multiple packet sources. When a packet source is detected to be using more than an acceptable allocation of the lookup resources, access to the packet processing pipeline for that source is limited or curtailed to bring that source back within an acceptable allocation of resources. This backpressure mechanism can be used to control sources that, although within a bandwidth limit, are submitting a packet type mix that is consuming unfair percentages of lookup resources in an oversubscribed system. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: September 27, 2011
    Assignee: Force 10 Networks, Inc.
    Inventors: Krishnamurthy Subramanian, Amrik Baines, Manu Thomas, Jason Lee, Ajoy Aswadhati
  • Patent number: 8026450
    Abstract: A circuit board comprises a center segment distributing power and low-speed signaling, and outer segments for high-speed signaling. The segments use dielectric materials with different dielectric constants, with the outer segments supporting higher-speed signal transmission.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 27, 2011
    Assignee: Force 10 Networks, Inc.
    Inventor: Joel R. Goergen
  • Publication number: 20110228779
    Abstract: A packet network device such as a network switch includes a number of functional cards or chassis modules at least some of which are connected to both an electrical backplane and a wireless backplane. The electrical backplane provides data plane signal paths and the wireless backplane provides control plane signal paths.
    Type: Application
    Filed: May 10, 2010
    Publication date: September 22, 2011
    Applicant: Force 10 Networks, Inc.
    Inventor: JOEL R. GOERGEN
  • Publication number: 20110222547
    Abstract: A packet network device includes a packet network processor memory system for storing information used to process and forward packets of information in and through the network device. The information is included in look-up tables whose entries can be mapped either horizontally or vertically into the memory system. In the event that the entries are mapped horizontally, a complete entry can be access at a single memory location and in the event that the entries are mapped vertically, the entries can be accessed at one or more memory locations.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 15, 2011
    Applicant: Force 10 Networks, Inc.
    Inventors: KRISHNAMURTHY SUBRAMANIAN, Raja Jayakumar, Jason Lee
  • Publication number: 20110225207
    Abstract: A network device such as a router or a switch is comprised of a control module and a plurality of physical line cards. The control module includes a control processor virtual machine, a plurality of route processing virtual machines and one or more instances of a line card virtual machine. The line card virtual machine operates to receive routing information base update information, to modify the routing information base according to the update information and to update each instance of a plurality of forwarding information bases included on each of the physical line cards.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 15, 2011
    Applicant: Force 10 Networks, Inc.
    Inventors: KRISHNAMURTHY SUBRAMANIAN, RAHUL KULKARNI
  • Patent number: 8014278
    Abstract: A packet network device has multiple equal output paths for at least some traffic flows. The device adjusts load between the paths using a structure that has more entries than the number of equal output paths, with at least some of the output paths appearing as entries in the structure more than once. By adjusting the frequency and/or order of the entries, the device can effect changes in the portion of the traffic flows directed to each of the equal output paths. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: September 6, 2011
    Assignee: Force 10 Networks, Inc
    Inventors: Krishnamurthy Subramanian, Eddie Tan, Rajeev Manur