Patents Assigned to Forza Silicon Corporation
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Patent number: 11722145Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.Type: GrantFiled: April 8, 2019Date of Patent: August 8, 2023Assignee: Forza Silicon CorporationInventor: Daniel Van Blerkom
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Patent number: 10297630Abstract: A system that has plural different photodetector circuits, each photodetector circuit including its own transfer gate, and each of the plural different photodetector circuits and transfer gates commonly connected to a first node. In amplifier is used which maintains a fixed voltage edits input. The amplifier Has a first capacitance to ground in a second capacitance as a feedback between its output and input. In one embodiment, there are 16 photodetector circuits connected to the single amplifier. In embodiments, the photodetector circuits can be located in one substrate while the amplifier is located in another substrate, and the amplifier also minimizes parasitics between the substrates.Type: GrantFiled: June 17, 2013Date of Patent: May 21, 2019Assignee: Forza Silicon CorporationInventors: Barmak Mansoorian, Ramy Tantawy
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Patent number: 10256833Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.Type: GrantFiled: January 23, 2014Date of Patent: April 9, 2019Assignee: Forza Silicon CorporationInventor: Daniel Van Blerkom
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Patent number: 10043843Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.Type: GrantFiled: October 1, 2014Date of Patent: August 7, 2018Assignee: Forza Silicon CorporationInventors: Barmak Mansoorian, Daniel Van Blerkom
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Patent number: 10027917Abstract: Disclosed herein are improved in-pixel correlated double sampling elements for photodetectors. The novel circuits and associated methods of the invention allow for accurate correlated double sampling while avoiding the inherent sampling errors that may occur in prior art in-pixel correlated double sampling techniques when bright or saturating signals are received.Type: GrantFiled: October 5, 2015Date of Patent: July 17, 2018Assignee: Forza Silicon CorporationInventors: Jonathan Bergey, Sam Bagwell
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Patent number: 9787928Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.Type: GrantFiled: January 6, 2016Date of Patent: October 10, 2017Assignee: Forza Silicon CorporationInventors: Dexue Zhang, Yingying Wang, Loc Truong, Steven Huang
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Patent number: 9752928Abstract: An image sensor pixel the conformist single pixel of a larger array. The image sensor pixel can be a large one, such as larger than 100 ?m. The image sensor pixel has readout notes on multiple sides thereof, e.g. on to work for sides, that are symmetrically located on the pixel. The readout notes are simultaneously read out to read out a part of the image from the pixel.Type: GrantFiled: July 23, 2013Date of Patent: September 5, 2017Assignee: Forza Silicon CorporationInventors: Guang Yang, Loc Truong
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Patent number: 9661243Abstract: An imaging device and method for operating the imaging device. Some embodiments comprise a pixel array configured as rows and columns of binning pixel units, each binning pixel unit including a plurality of photosensors that generate respective charge signals in response to incident light. Each binning pixel unit is configured to selectively bin the charge from at least two of the photosensors. The pixel array may be readout in a binning-pixel-unit row by binning-pixel-unit row basis. During readout of each binning pixel unit row, each binning pixel unit in the row is operable to selectively bin at least two of the charge signals therein based on a respective one of control signals provided to each of the binning pixel units in the row. In reading out a binning pixel unit row for a given image frame, a first binning pixel unit may perform in-pixel charge domain binning while a second binning pixel unit in the row may not bin the charge from the different photosensors therein.Type: GrantFiled: March 17, 2014Date of Patent: May 23, 2017Assignee: FORZA SILICON CORPORATIONInventors: Guang Yang, Ramy Tantawy
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Patent number: 9548755Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which an ADC comprises built-in redundancy such that the ADC can start its conversion cycle before the ADC input settles to a desired resolution and the ADC can yet accurately convert the ADC input to a digital value with the desired resolution. In a CMOS image sensor, such an ADC configuration enables the pixel readout time to overlap with the ADC conversion time, reducing the total time needed to convert the pixel signal value to a digital value with the desired resolution.Type: GrantFiled: July 3, 2014Date of Patent: January 17, 2017Assignee: FORZA SILICON CORPORATIONInventors: Steven Huang, Ali Mesgarani, Daniel Van Blerkom
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Patent number: 9391574Abstract: An image sensor array that has a plurality of image sensing pixels and a plurality of programmable gain amplifiers, each of the programmable gain amplifiers connected to receive and amplify an output of said image sensing pixels. Each of said programmable gain senses when an output of the programmable gain amplifier is in an oversaturated condition. Responsive to sensing that the output of the programmable gain amplifier in the oversaturated condition, the amplifier automatically clamps a bias amount to the programmable gain amplifier, to thereby regulate an amount of current draw of the programmable gain amplifier. In this way, the power supply current to that pixel which is oversaturated is prevented from affecting power supplies to the other pixels, by regulating the power supply to the oversaturated pixel.Type: GrantFiled: January 29, 2013Date of Patent: July 12, 2016Assignee: Forza Silicon CorporationInventors: Steven Huang, Jack Zheng
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Patent number: 9357149Abstract: An image sensor system has a first stitched image sensor part that has multiple image sensing pixels and pixel gates. The multiple pixel gates are connected together by a first line on the first stitched image sensor part, and said multiple pixel gates are controlled by a first control signal. A second stitched image sensor part also has multiple sensing pixels and pixel gates, and the multiple pixel gates are connected together by a second line on said second stitched image sensor part, and said multiple pixel gates on said second stitched image sensor part are controlled by the first control signal. A driver for the first control signal, wherein said driver includes a first part for controlling said multiple pixel gates of said first stitched image sensor part and said driver has a second part, also driven by the same first control signal, for controlling said multiple pixel gates of said second stitched image sensor part.Type: GrantFiled: July 23, 2013Date of Patent: May 31, 2016Assignee: Forza Silicon CorporationInventors: Barmak Mansoorian, Daniel vanBlerkom, Loc Truong, David Estrada
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Patent number: 9307175Abstract: An image sensor system that compensates the amplifier in a column of a pixel array. This uses a sampling capacitor, that receives a signal from a pixel of the pixel array. A first plate of the sampling capacitor receives a value from the amplifier representing an offset level of the amplifier. While receiving the offset level from the amplifier on the first plate, the capacitor receives information from the pixel on a second plate of the same capacitor that is receiving the offset, thereby canceling the offset. The value from said sampling capacitor indicative of said information from said pixel with said offset cancelled being coupled to said amplifier to amplify said value as a first pixel value. The amplifier is also connected to other selecting switches from other pixels of said column of the pixel array.Type: GrantFiled: May 24, 2013Date of Patent: April 5, 2016Assignee: Forza Silicon CorporationInventor: Daniel Van Blerkom
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Patent number: 9264644Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which pixels can be readout non-destructively, and wherein a non-destructive pixel read may be used to provide a coarse analog-to-digital conversion such that information can be stored, and the stored information is then applied in a fine analog-to-digital conversion during a subsequent actual pixel read.Type: GrantFiled: April 25, 2014Date of Patent: February 16, 2016Assignee: FORZA SILICON CORPORATIONInventor: Steven Huang
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Patent number: 9219449Abstract: A circuit for an image sensor pixel receives photogenerated information from an image sensor, such as infrared sensor. The circuit includes a single ended operational amplifier, they can have a simple circuit such as for example 4 transistors. An additional transistor is used in the pixel to regulate the voltage that is used to drive the operational amplifier, to maintain that voltage relative to a bias level. This prevents voltage fluctuations, which would otherwise be passed to the pixel output.Type: GrantFiled: July 23, 2013Date of Patent: December 22, 2015Assignee: Forza Silicon CorporationInventors: Guang Yang, Jonathan Bergey
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Patent number: 9209221Abstract: An image sensor system has an input from a photosensor, receiving photogenerated electricity, and coupling said photogenerated electricity to a first photodiode to integrate the photogenerated electricity. The photodiode can be a pinned diode, configured to act integrate charge.Type: GrantFiled: July 23, 2013Date of Patent: December 8, 2015Assignee: Forza Silicon CorporationInventor: Guang Yang
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Patent number: 9172873Abstract: An image sensor array that has a buffer amplifier, having a capacitor which receives photogenerated energy from a photodetector, and stores the photo generated energy in a capacitor of the buffer amplifier. A reset across the buffer amplifier is applied at a time which is sufficient to allow the amplifier to settle transiently prior to applying the clamp voltage. There is also a source follower that is enabled to operate at a time just before snapshot operation, and then turned off when the snapshot is over, to save on power.Type: GrantFiled: May 31, 2013Date of Patent: October 27, 2015Assignee: Forza Silicon CorporationInventors: Guang Yang, Jonathan Bergey
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Patent number: 9007500Abstract: An image sensor system using a circuit that automatically provides a multiple point output which represents, in a first mode, each of the multiple points receiving outputs at substantially the same time delayed only by a transit time across a wire connecting the multiple point outputs, and in a second mode, each of the multiple points producing outputs that are delayed by a delay time, where each output is delayed relative to each other output by said delay time in the second mode.Type: GrantFiled: July 24, 2013Date of Patent: April 14, 2015Assignee: Forza Silicon CorporationInventors: David Estrada, Sam Bagwell, Loc Truong
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Patent number: 8922261Abstract: A ramp generator circuit, e.g. foreign analog-to-digital converter. The ramp generator circuit has first and second current sources that are maintained in the on condition whether they are being used or not. A switched capacitor connects to the current source in order to create a multi-slope ramp.Type: GrantFiled: July 23, 2013Date of Patent: December 30, 2014Assignee: Forza Silicon CorporationInventors: Dexue Zhang, Rami Yassine
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Patent number: 8907827Abstract: Calibrating of A/D converters is carried out by obtaining adjustable reference voltages which are used in A/D conversion, comparing a first divided reference voltage of a full range voltage Vref, with a second divided reference voltage of Vref using analog to digital converters that are used in the A/D conversion; and adjusting at least one of said reference voltages to obtain a set ratio between said multiple ones of said reference voltages. The compared values can include a divided version of Vref, e.g., 3/8 Vref.Type: GrantFiled: June 1, 2013Date of Patent: December 9, 2014Assignee: Forza Silicon CorporationInventors: Christophe Basset, Loc Truong, Kevin Stevulak
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Patent number: 8816892Abstract: A successive approximation A/D converter which includes a sub ranging classifier that receives an input signal and classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging classifier also setting and determining an offset based on said range, and a successive approximation A/D converted that converting lowest resolution parts of the input signal as adjusted by the offset.Type: GrantFiled: October 20, 2012Date of Patent: August 26, 2014Assignee: Forza Silicon CorporationInventors: Steven Huang, Ramy Tantawy, Daniel Van Blerkom, Barmak Mansoorian