Patents Assigned to Fuji Electronic Co., Ltd.
  • Patent number: 10573112
    Abstract: A coin storage device includes: storage compartments that store therein coins by denomination; and screw-type conveying members, installed for the respective storage compartments, each of the screw-type conveying members including a shaft having an elongated shape and having an outer circumferential surface provided with a blade portion that protrudes radially outwards in a spiraling shape, and conveying coins toward a front side by being rotated in one direction about a central axis of the shaft. Further, each of the screw-type conveying members includes an actuating portion to move center of gravity of coins accumulated on the actuating portion up and down periodically as the screw-type conveying member is rotated about the central axis of the shaft.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: February 25, 2020
    Assignee: FUJI ELECTRONICS CO., LTD.
    Inventors: Yoshihiro Taniguchi, Masashi Nagata, Yoshiyuki Fukushima, Takao Okuhara
  • Patent number: 10097174
    Abstract: A semiconductor device includes a switching element including a control electrode, a first main electrode, and a second main electrode: a gate driver connected between the control electrode and the first main electrode, configured to transmit a gate drive signal for driving the control electrode; a Miller voltage detector detecting a Miller voltage between the control electrode and the first main electrode when the switching element turns off; a current value detector detecting a principal current flowing through the switching element; and a temperature calculator calculating a temperature of the switching element from the detected Miller voltage and principal current.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: October 9, 2018
    Assignee: FUJI ELECTRONICS CO., LTD.
    Inventors: Shuangching Chen, Shogo Ogawa
  • Patent number: 9143035
    Abstract: Aspects of the invention include a switching power supply device that includes a zero current detecting circuit that detects zero current of electric current flowing through the inductor to turn ON the switching element, an ON width generating circuit that determines the ON width of the switching element to turn OFF the switching element, and an OFF width detecting circuit that detects the OFF width of the switching element based on the output of the ON width generating circuit and the output of the zero current detecting circuit, and holds the OFF width until the next operating cycle. Aspects of the invention also include an ON width adjusting circuit that is included in the ON width generating circuit and adjusts the ON width of the switching element in the next operation cycle according to the width detected by the OFF width detecting circuit.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: September 22, 2015
    Assignee: FUJI ELECTRONIC CO., LTD.
    Inventor: Jian Chen
  • Patent number: 8891196
    Abstract: A method of reading and writing a magnetic recording medium using a magnetic head that has an element portion, the magnetic recording medium including a base, a metal film formed on the base, a protective film formed on the metal film, and a lubricating film formed on the protective film. The method includes reading and writing the magnetic recording medium while positioning the element portion of the magnetic head in the lubricating film.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 18, 2014
    Assignee: Fuji Electronic Co., Ltd.
    Inventor: Naruhisa Nagata
  • Patent number: 8854816
    Abstract: The front case of the unit case contains a circuit section including a power semiconductor module, and the rear case contains a cooling fin assembly of the semiconductor module and a cooling fan. The cooling air ventilated through the wind channel by the cooling fan is discharged upward from the unit case. The water-proof cover is placed over the top of the unit case. The water-proof cover includes an exhausting structure formed with openings downward at the left and right sides of a front part of the water-proof cover to form an exhausting path; and a ventilation guide formed around an exhausting port inside a rear part of the water-proof cover. The cooling air discharged to the inside space of the water-proof cover by the cooling fan is ventilated through the ventilating path and exhausted outside through the exhausting path.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: October 7, 2014
    Assignee: Fuji Electronic Co., Ltd.
    Inventor: Takanori Shintani
  • Publication number: 20120267750
    Abstract: A semiconductor apparatus having a bootstrap-type driver circuit includes a cavity for a SON structure formed below a bootstrap diode Db, and a p-type floating region formed in a n? epitaxial layer between a bootstrap diode Db and a p-type GND region at the ground potential (GND). The p-type floating region extends to the cavity for suppressing the leakage current caused by the holes flowing to the p? substrate in charging an externally attached bootstrap capacitor C1. The semiconductor apparatus which includes a bootstrap-type driver circuit facilitates suppressing the leakage current caused by the holes flowing to the p? substrate, when the bootstrap diode is biased in forward.
    Type: Application
    Filed: April 17, 2012
    Publication date: October 25, 2012
    Applicant: FUJI ELECTRONIC CO., LTD.
    Inventors: Tomohiro IMAI, Masaharu Yamaji
  • Publication number: 20120134201
    Abstract: A magnetic memory element and a method of driving such an element are disclosed. The magnetic memory element has a magnetic tunnel junction portion with a spin-valve structure having a perpendicular magnetization free layer formed of a perpendicular magnetization film, a perpendicular magnetization pinned layer formed of a perpendicular magnetization film, and a nonmagnetic layer sandwiched between the perpendicular magnetization free layer and the perpendicular magnetization pinned layer, and records information by application of an electric pulse to the magnetic tunnel junction portion. An in-plane magnetization film, interposed in the path of the electric pulse, is disposed in the magnetic tunnel junction portion. The in-plane magnetization film is configured so as to exhibit antiferromagnetic (low-temperature)-ferromagnetic (high-temperature) phase transitions depending on temperature changes based on application of the electric pulse to the magnetic tunnel junction portion.
    Type: Application
    Filed: May 14, 2010
    Publication date: May 31, 2012
    Applicant: FUJI ELECTRONIC CO., LTD
    Inventor: Yasushi Ogimoto
  • Publication number: 20120074542
    Abstract: A semiconductor device, in which a control circuit board is mountable outside a sheath case and a power semiconductor element is placeable inside the sheath case, includes a metal step support, a shield plate and a metal ring. The support includes a base portion implanted in the sheath case, a connection portion which extends from an end of the base portion, and a step portion formed at a boundary between the base portion and the connection portion. The shield plate is disposed over the step portion such that the connection portion of the support pierces the shield plate. An end of the metal ring protrudes from an end of the connection portion over the shield plate. The semiconductor device is adapted such that the control circuit board is mounted over the protruded end of the metal ring and is fixed onto the connection portion by an engagement member.
    Type: Application
    Filed: June 9, 2010
    Publication date: March 29, 2012
    Applicant: FUJI ELECTRONIC CO., LTD.
    Inventor: Shin Soyano
  • Publication number: 20110306191
    Abstract: A method of manufacturing a super-junction semiconductor device facilitates increasing the epitaxial growth rate without increasing the manufacturing steps greatly. In substitution for the formation of alignment mark in the surfaces of the second and subsequent non-doped epitaxial layers, patterning for forming a new alignment mark is conducted simultaneously with the resist pattering for selective ion-implantation into the second and subsequent non-doped epitaxial layers in order to form the new alignment mark at a position different from the position, at which the initial alignment mark is formed, and to form the new alignment mark in every one or more repeated epitaxial layer growth cycles.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 15, 2011
    Applicant: FUJI ELECTRONIC CO., LTD.
    Inventor: Akihiko OHI
  • Publication number: 20050186358
    Abstract: A perpendicular magnetic recording medium and method thereof, includes a nonmagnetic substrate; a soft magnetic under layer; an intermediate layer; a bilayer magnetic recording layer; a protective layer; and a liquid lubricant layer. According to a following order, the soft magnetic under layer, the intermediate layer, the bilayer magnetic recording layer, the protective layer, and the liquid lubricant layer are sequentially stacked on the nonmagnetic substrate. The bilayer magnetic recording layer includes a first magnetic layer including a CoCr alloy crystalline film, and a second magnetic layer including a rare earth-transition metal alloy noncrystalline film.
    Type: Application
    Filed: April 27, 2005
    Publication date: August 25, 2005
    Applicant: FUJI ELECTRONIC CO., LTD.
    Inventors: Yasushi Sakai, Hiroyuki Uwazumi, Kazuo Enomoto, Sadayuki Watanabe
  • Patent number: 6900081
    Abstract: A semiconductor device has a depletion type MIS transistor, a transistor forming a masked ROM, and a submicron CMOS integrated on a single or common semiconductor substrate, while minimizing the steps of manufacturing the depletion type MIS transistor. During implantation of ions for changing an enhancement type transistor into a depletion type transistor, impurity ions can be implanted to change the transistor forming the masked ROM into resistance, so that the depletion type transistor, the transistor constituting the mark ROM, and a submicron CMOS can be integrated on a single or common semiconductor substrate.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: May 31, 2005
    Assignee: Fuji Electronic Co., Ltd.
    Inventor: Akio Kitamura
  • Publication number: 20040263833
    Abstract: A magnetic transfer apparatus writing a servo signal by magnetically transferring to a magnetic recording medium, and an optical type inspection apparatus for optically inspecting scratch or foreign matter on the magnetic recording medium wherein a characteristic grease is used for these apparatuses are disclosed. Grease used in the magnetic transfer apparatus or the optical type inspection apparatus generates sulfur type gas in amount less than or equal to 0.5 ppb.
    Type: Application
    Filed: May 14, 2004
    Publication date: December 30, 2004
    Applicants: Matsushita Electric Industrial Co., Ltd., Fuji Electronic Co., Ltd.
    Inventors: Masaki Kondo, Mitsuo Kobayashi, Eiichi Fujisawa
  • Patent number: 6506506
    Abstract: A fluorescent color conversion film has an organic fluorescent dye, which absorbs light obtained from a light-emitting element in the near ultraviolet to the visible range and emits a visible light of a different wavelength, and a matrix resin, which bears the organic fluorescent dye. The organic dye is an immobilized organic fluorescent dye enclosed by a cyclodextrin derivative represented by general formula (I), wherein n is an integer from 4 to 10, each of R1-R5 are selected independently from the group consisting of a hydrogen atom, a carboxyl group, a hydroxyl group, and a C1-C6 alkyl group. An organic light-emitting device equipped with this fluorescent color conversion film suppresses the decomposition and quenching of the fluorescent dye from attacks by radicals generated from the polymerization initiators in photolithography and/or growth radicals of reactive multifunctional monomers.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: January 14, 2003
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Yoshimasa Tomiuchi, Yotaro Shiraishi
  • Patent number: 6191485
    Abstract: In a semiconductor device having a laminated metal layer in which a metal layer whose main component is aluminum and a metal layer whose main component is nickel are laminated on each other, the ratio (tAl/tNi) of the thickness (tAl) of the metal layer whose main component is aluminum to that (tNi) of the metal layer whose main component is nickel is controlled to 5 or larger, so that part of the metal layer whose main component is aluminum remains even if an Al—Ni intermetallic compound is formed.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: February 20, 2001
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Tomoyuki Kawashima, Kenji Okamoto, Tadayoshi Ishii, Mitsuaki Kirisawa, Kazuhiko Imamura
  • Patent number: 5559347
    Abstract: An insulated gate-type bipolar transistor with an overcurrent limiting function that is capable of keeping the ratio of a main current to a detection current constant even under different operating conditions, and capable of suppressing the voltage dependence of the limited-current value to perform stable overcurrent protection. P-wells are formed so that they are incorporated between main cell IGBTs as sensing cells for current detection on part of the semiconductor substrate on which a large number of main cells are formed integratedly, and current-detecting emitter electrodes connected to the P-wells are connected to an overcurrent-protection circuit and separated from the main emitter electrodes connected to the main IGBT cells.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: September 24, 1996
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Tomoyuki Yamazaki, Masahito Otsuki
  • Patent number: 5255176
    Abstract: A control circuit for an inverter for converting DC voltage to AC voltage, operable in an individual mode and an interconnection mode, and including a synchronous compensating circuit in which, when the inverter is operating in a power system synchronous operation mode under control of a synchronous-interconnection control system, a quantity of an instantaneous voltage variation component occurring in the power system is separated, in order to detect respectively, a quantity of the variation of the component in same phase with a reference voltage vector of the output voltage of the inverter, and a quantity of the variation of the component orthogonal to the reference voltage vector. The detected variation quantities are respectively added to the outputs of a voltage adjuster and a phase adjuster in the synchronous-interconnection control system. The circuit is capable of compensating an instantaneous variation of the power system without a decrease of circuit stability.
    Type: Grant
    Filed: July 18, 1991
    Date of Patent: October 19, 1993
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Yasunori Hatta, Naoya Eguchi
  • Patent number: 5243223
    Abstract: A semiconductor device includes a housing, a semiconductor element disposed in a lower section inside the housing, an external lead terminal at least partially disposed within the housing, a gelled filler disposed within the housing, the semiconductor element and at least a portion of the external lead terminal being embedded in the gelled filler, a hardened sealing resin layer disposed over the gelled filler, and at least one internal pressure absorbing chamber having a pocket-type sealed space, the internal pressure absorbing chamber passing through the sealing resin layer and being open at an upper surface side of the gelled filler. The semiconductor device prevents a rise in the internal pressure of the housing in response to thermal expansion of the gelled filler sealed within the housing, and the absorption of external moisture by the gelled filler.
    Type: Grant
    Filed: January 29, 1992
    Date of Patent: September 7, 1993
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Toshifusa Yamada, Hiroaki Matsushita
  • Patent number: 5153737
    Abstract: An image forming apparatus with an editing function for making up documents for respective distribution destinations from an original document on which the distribution destinations are indicated by closed areas with markers. The image forming apparatus comprises a marker detection portion for detecting position information of the markers at the time of pre-scanning, a marker position storage portion for storing the position information of the markers, a marker removal portion for removing the markers from original document information at the time of main-scanning, and a marker processing and combining portion for making up processed information on the basis of the marker position information stored in the marker position storage portion every time when the main-scanning is performed, and for combining the processed information with the marker-removed original document information.
    Type: Grant
    Filed: August 22, 1991
    Date of Patent: October 6, 1992
    Assignee: Fuji Electronic Co., Ltd.
    Inventor: Junichi Kobayashi
  • Patent number: D527706
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: September 5, 2006
    Assignee: Fuji Electronics Co., Ltd.
    Inventors: Kouetsu Takaya, Toshikatsu Ogami
  • Patent number: D739890
    Type: Grant
    Filed: May 26, 2014
    Date of Patent: September 29, 2015
    Assignee: Fuji Electronic Co., Ltd.
    Inventors: Yuji Ogawa, Keiichi Kurokawa