Patents Assigned to Fujitsu Hitachi Plasma Display Limited
-
Patent number: 7535438Abstract: A PDP apparatus, the peak luminance of which has been improved with little modification of the existing circuit structure, has been disclosed, in which a thinning process that shortens an address period by hiding part of display lines in a fixed subfield of a low luminance is performed, the saved time is increased by an amount corresponding to that from which the luminance weight (the number of sustain discharge pulses, that is, the length of the sustain discharge period) of the thinned subfield of a low luminance is subtracted, and the remaining time is allocated at the ratio of the luminance weights on completion of the first step in each subfield.Type: GrantFiled: April 8, 2005Date of Patent: May 19, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Masanori Takeuchi, Kyoji Kariya
-
Patent number: 7531963Abstract: An insulation layer covering segment layers and a plurality of row electrodes arranged on a first substrate has, on its surface, first projections and second projections. The first projections have a shape and a height corresponding to those of the row electrode, and contacts partitions disposed on a second substrate. The second projections have a shape and a height corresponding to those of the segment layer. The partitions and the second projections constitute discharge barriers between columns, which prevents discharge interference from occurring between cells along the row electrodes.Type: GrantFiled: February 21, 2006Date of Patent: May 12, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Takashi Sasaki, Takahiro Takamori
-
Patent number: 7531962Abstract: To maximize the efficiency of utilization of mother substrates used as material for the substrates in the flat display panel to form a display screen, the flat display panel includes a display screen formed by tetragonal first and second substrates. Four sides or opposite two sides forming a tetragonal peripheral edge of the first substrate are rendered to be substantially equal to those of the second substrate, and the first and second substrate are sandwiched together with one of the first and second substrates protruding in part outwardly from the peripheral edge of the other of the first and second substrates.Type: GrantFiled: August 30, 2004Date of Patent: May 12, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yasuhiko Kunii, Hiroyuki Nakahara, Tomohiko Murase, Fumihiro Namiki
-
Patent number: 7531952Abstract: A front sheet that is a layered film glued on a front face of a display panel includes a front portion made of plural layers having the same plane size and different functions and a rear portion having a plane size smaller than the front portion and larger than the screen, and the rear portion is put on the front face of the display panel.Type: GrantFiled: January 28, 2005Date of Patent: May 12, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yoshimi Kawanami, Nobuyuki Hori, Atsuo Ohsawa, Fumihiro Namiki
-
Patent number: 7521867Abstract: A plasma display panel (PDP) not only capable of reducing a discharge start voltage but also of making the discharge start voltage uniform in each cell without being adversely affected by the variations in the distance between electrodes caused during manufacture has been disclosed, wherein a pair of electrodes, provided in each of a plurality of cells respectively in which a discharge is caused to occur selectively for display in a discharge space, has facing edges, respectively, provided for discharge and the distance between the facing edges changes when viewed from a direction perpendicular to a substrate and the edges in each of the plurality of cells have substantially the same shape.Type: GrantFiled: September 9, 2004Date of Patent: April 21, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Takashi Sasaki, Masayuki Shibata, Takahiro Takamori, Hideki Harada
-
Patent number: 7522129Abstract: An electrode drive circuit of a plasma display device comprises: a scan driver provided with plural drivers including first and second switching elements and first and second diodes; a capacitor connected between the high potential side terminal and the low potential side terminal of the scan driver; a voltage supply circuit for selectively supplying plural voltages relating to the positive and negative voltages of the reset pulse and the voltage of a scan pulse to the low potential side terminal of the second switching element; and a negative reset switch and a resistor connected in series between the high potential side terminal of the first switching element and a ground terminal, wherein the reset pulse of negative polarity is applied by turning on the negative reset switch in a state where the capacitor is charged with the negative voltage of the reset pulse.Type: GrantFiled: March 24, 2006Date of Patent: April 21, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yoshikazu Kanazawa, Shigetoshi Tomio, Takashi Fujisaki
-
Patent number: 7518573Abstract: In a plasma display device comprising: plural first, second, and third electrodes disposed adjacently and extending in a first direction, the third electrodes being provided between the first and second electrodes for repeating discharges; a dielectric layer covering the electrodes, a first electrode driving circuit for driving the first electrodes; a second electrode driving circuit for driving the second electrodes; and a third electrode driving circuit for driving the third electrodes, grayscale display is performed by a sub-field method, and the third electrodes are set to have a potential approximately the same as that of the first or second electrode at the discharge in the repetitive discharges. The third electrode driving circuit changes the ratio of the discharges in which the third electrodes operate as cathodes to the discharges in which they operate as anodes in the period when the discharges are repeated, at least in one sub-field.Type: GrantFiled: January 9, 2006Date of Patent: April 14, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Takashi Sasaki, Takayuki Kobayashi, Naoki Itokawa
-
Patent number: 7513194Abstract: A screen mask includes a screen mesh with a tensioning force of 196 to 392 N/mm; a tension mesh with a tensioning force of 49 to 98 N/mm; a resin plate (fixing part) arranged so as to surround the outer periphery of the screen mesh for fixing a part of the tension mesh with a tensioning force of 392 to 980 N/mm; and a screen frame. A length Ls of the screen mesh in a first direction intersecting a direction in which a squeegee squeegees on the screen mesh when performing a screen printing is 0.6 to 0.9 times a length Lt of the tension mesh in the first direction, a length Lk of the resin plate, the length Ls, and the length Lt in the first direction satisfy a relationship Lk=a(Lt+Ls)/2, where “a” is a coefficient in a range of 0.5 to 1.2.Type: GrantFiled: April 26, 2007Date of Patent: April 7, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Naoto Yanagihara, Masayuki Seto, Mikio Nakashima, Nobuyuki Ushifusa
-
Patent number: 7511441Abstract: A semiconductor integrated circuit capable of reducing the influence of the difference in ambient temperature etc. and realizing a stable phase adjustment circuit has been disclosed. The semiconductor integrated circuit comprises a delay time adjustment circuit for delaying the rising edge or the falling edge of an input signal and changing the amount of delay, a comparison circuit for comparing an output signal from the delay time adjustment circuit with a predetermined voltage, a high-level shift circuit for shifting an output signal from the comparison circuit into a signal on the basis of an output reference voltage, and an output amplifier circuit for amplifying an output signal from the high-level shift circuit and outputting a signal for driving the semiconductor device, wherein the delay time adjustment circuit, the comparison circuit, the high-level shift circuit, and the output amplifier circuit are formed on a single chip.Type: GrantFiled: March 24, 2005Date of Patent: March 31, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Makoto Onozawa, Tomokatsu Kishi, Yoshinori Okada, Masatoshi Hira
-
Patent number: 7492081Abstract: A method for manufacturing a display panel module is provided by which production costs are reduced. A method is provided for manufacturing a display panel module that includes a display panel, a functional film and a drive circuit board. The method includes attaching the drive circuit board to the display panel, conducting a lighting test of the display panel using the drive circuit board to confirm that the display panel is an acceptable product, and bonding the functional film to a front face of the display panel. In the bonding process, an adhesive layer having a thickness equal to or more than 200 microns is interposed between the front face of the display panel and the functional film.Type: GrantFiled: December 6, 2005Date of Patent: February 17, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Nobuyuki Hori, Yoshimi Kawanami
-
Publication number: 20090040148Abstract: A display apparatus, which displays a color image by controlling the number of emissions or the intensity thereof in accordance with primary color video signals input thereto, has a detection portion and a white balance correction portion. The detection portion is used to detect the number of emissions or the intensity, and the white balance correction portion is used to correct white balance by adjusting the amplitudes of the primary color video signals in accordance with the detected number of emissions or the detected intensity. Therefore, correct white balance can be maintained regardless of the number of emissions or the intensity of emission.Type: ApplicationFiled: September 22, 2008Publication date: February 12, 2009Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Ken Kumakura, Hideaki Ohki, Yuichiro Kimura, Yasuji Noguchi, Takayuki Ooe
-
Patent number: 7482755Abstract: Conventionally, when a thickness of a dielectric layer is reduced without changing an electrode shape, a drive margin is reduced and stable driving cannot be performed. In a discharge cell, a display electrode comprises a projection extending in a column direction from an electrode body extending in a row direction, the projection forms a discharge gap together with an adjacent paired projection of the other display electrode, the projection includes a first projection and a second projection having two kinds of widths in a row direction, and when a ratio of widths of the second projection on the discharge gap side to the first projection on the electrode body side is assumed as Y and a thickness of the dielectric layer as X, Y?0.2·X, X?20 and Y?0.5 are satisfied.Type: GrantFiled: March 30, 2006Date of Patent: January 27, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Norihiro Uemura, Masayuki Shibata, Hideki Harada, Yoshimi Kawanami, Osamu Toyoda
-
Publication number: 20080309237Abstract: A functional sheet is brought into intimate contact with a front surface of a plasma display panel, and the functional sheet has a structure in which heat diffusion is superior to heat insulation between the plasma display panel and outside air. In addition, a display device includes a controller for controlling a drive voltage pulse train so that power consumption in a unit area in a light emission region within the screen is limited under a set value when one image is displayed.Type: ApplicationFiled: August 15, 2008Publication date: December 18, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Nobuyuki HORI, Yoshimi Kawanami, Atsuo Ohsawa, Fumihiro Namiki
-
Patent number: 7466292Abstract: According to the present invention, a plasma display apparatus, which represents the luminance of one frame in accordance with a combination of plural sub-frames having luminance levels corresponding to a plurality of weighted values, additionally includes a sub-frame having a luminance level lower than the minimum gray scale level of luminance which can be represented by the number of bits in the input video data. Such plasma display apparatus turns on a desired combination of the sub-frames so as to increase the resolution of the luminance without increasing the conventional number of gray scale levels included in the input video data. In a preferred embodiment, especially when the added smaller luminance sub-frame is included in a combination of sub-frames for a low luminance area, the resolution of the gray scale of the low luminance area can be increased, and the representation of gray scale can be enhanced in a low luminance area to which the sight of a person is more sensitive.Type: GrantFiled: November 14, 2005Date of Patent: December 16, 2008Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Ayahito Kojima, Hiroyuki Wakayama, Hirohito Kuriyama, Akira Yamamoto
-
Publication number: 20080305706Abstract: A method for manufacturing a plasma display panel is provided. The method includes making a front substrate and a rear substrate individually and applying a low melting point glass paste including non-porous bead onto a portion of the front substrate or the rear substrate so that the applied low melting point glass paste forms a frame-like shape having a height greater than that of the structural member. The method includes assembling the front substrate and the rear substrate in a face-to-face relation with each other and burning the applied low melting point glass paste while vacuuming a discharge gas space between the front substrate and the rear substrate so as to seal the front substrate and the rear substrate.Type: ApplicationFiled: August 11, 2008Publication date: December 11, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Minahiro Nonomura, Naoto Yanagihara, Masayuki Seto, Yoshitaka Ukai, Ryouichi Miura
-
Patent number: 7460088Abstract: A plasma display apparatus, in which the display quality of a dark image is improved and which uses a subfield method, has been disclosed. The plasma display apparatus comprises a plasma display panel, a sustain pulse cycle changing means for detecting the display load ratio of each subfield and changing the sustain pulse cycle of each subfield according to the display load ratio, and an adaptive subfield number changing means for calculating a vacant time in a display frame generated by changing the sustain pulse cycle, judging whether a subfield can be added according to the vacant time, and determining the number of subfields in the display frame.Type: GrantFiled: January 25, 2005Date of Patent: December 2, 2008Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Masanori Takeuchi, Yasuji Noguchi, Yutaka Chiaki, Shunji Oota
-
Patent number: 7458871Abstract: According to the present invention, there is provided a gas discharge panel having at least a protective film containing a driving voltage-reducing compound.Type: GrantFiled: October 25, 2005Date of Patent: December 2, 2008Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Tadayoshi Kosaka, Souichirou Hidaka
-
Publication number: 20080291132Abstract: A high quality, three-electrode type plasma display apparatus, of which the display of low-luminance gradations has been improved by reducing the minimum luminance of the subfield, has been disclosed. In the plasma display apparatus, a subfield of even lower luminance is provided by: providing at least one subfield made up of only a reset period and an address period, without a sustain period, in one frame, and causing an address discharge to occur only between Y (second) electrodes and address (third) electrodes; or providing at least two second subfields made up of only a reset period and an address period in one frame, and making the intensity of an address discharge differ between the two second subfields.Type: ApplicationFiled: July 2, 2008Publication date: November 27, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Takashi SASAKI, Yuichiro Kimura, Satoru Nishimura
-
Publication number: 20080284685Abstract: A problem is to be solved that there is to be provided a plasma display device capable of generating driving signals with less variation in delay time and without carrying out any phase adjustment. There is provided a plasma display device including; a first display electrode; a second display electrode adapted to cause a discharge to occur between the first display electrode and the second display electrode; a first display electrode drive circuit for applying a discharge voltage to the first display electrode; and a second display electrode drive circuit for applying a discharge voltage to the second display electrode. The first display electrode drive circuit has a first output element for supplying a first electric potential to the first display electrode in accordance with a first input signal which is inputted by using a transformer.Type: ApplicationFiled: July 11, 2008Publication date: November 20, 2008Applicant: Fujitsu Hitachi Plasma Display LimitedInventors: Makoto Onozawa, Tomokatsu Kishi, Hideaki Ohki, Masaki Kamada
-
Publication number: 20080278418Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.Type: ApplicationFiled: July 11, 2008Publication date: November 13, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Yoshikazu KANAZAWA, Shigeharu ASAO