Patents Assigned to Future Waves UK Limited
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Patent number: 8203388Abstract: An amplifier having multiple gain modes comprises a plurality of cascoded input transistors connected to an input and arranged in parallel, a degeneration stage connected to the input transistors and having a variable impedance, and switching means for switching between different modes of the amplifier by switching off one or more of the input transistors and varying the impedance of the degeneration stage.Type: GrantFiled: January 15, 2007Date of Patent: June 19, 2012Assignee: Future Waves UK LimitedInventors: Ganesh Kathiresan, Kritsapon Leelavattananon
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Patent number: 8175208Abstract: A method of reducing d.c. offset comprises comparing the a first variable signal with a second variable signal, producing a control signal in dependence upon the comparison, providing the control signal to a charge pump for generation of a feedback signal, and varying the first signal and/or the second signal in dependence upon the feedback signal thereby reducing any difference between the d.c. level of the first signal and the d.c. level of the second signal.Type: GrantFiled: January 19, 2007Date of Patent: May 8, 2012Assignee: Future Waves UK LimitedInventor: Mark Dawkins
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Patent number: 7952417Abstract: Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least paType: GrantFiled: August 23, 2010Date of Patent: May 31, 2011Assignee: Future Waves UK LimitedInventor: Alison Burdett
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Publication number: 20100321113Abstract: An amplifier having multiple gain modes comprises a plurality of cascoded input transistors connected to an input and arranged in parallel, a degeneration stage connected to the input transistors and having a variable impedance, and switching means for switching between different modes of the amplifier by switching off one or more of the input transistors and varying the impedance of the degeneration stage.Type: ApplicationFiled: January 15, 2007Publication date: December 23, 2010Applicant: FUTURE WAVES UK LIMITEDInventors: Ganesh Kathiresan, Kristapon Leelavattananon
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Publication number: 20100315151Abstract: Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least paType: ApplicationFiled: August 23, 2010Publication date: December 16, 2010Applicant: FUTURE WAVES UK LIMITEDInventor: Alison Burdett
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Patent number: 7808287Abstract: A circuit for deriving an output clock signal from an input clock signal, the output clock signal having a frequency which is 1/Nth of the frequency of the input clock signal, where N is an odd number. The circuit comprises a plurality of latches configured as a latch ring, the latches being arranged in successive pairs, each pair of latches comprising a first latch that switches on one of the rising or falling edge of the input clock signal, and a second latch that switches on the other of the rising or falling edge of the input clock signal. An RS flip flop is coupled to receive at one of its set and reset inputs an output from the latch ring that is switched on a rising edge, and at the other of the set and reset inputs an output from the latch ring that is switched on a falling edge. Said output clock signal is provided at an output of the RS flip flop.Type: GrantFiled: January 15, 2007Date of Patent: October 5, 2010Assignee: Future Waves UK LimitedInventor: Robin James Miller
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Publication number: 20100188133Abstract: Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least paType: ApplicationFiled: January 15, 2007Publication date: July 29, 2010Applicant: FUTURE WAVES UK LIMITEDInventor: Alison Burdett
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Publication number: 20100189194Abstract: A frequency generation circuit comprises a crystal oscillator (10) for providing an input frequency, a phase-locked loop circuit (28), and a programmable frequency divider (42) for frequency dividing an output from the phase-locked loop circuit. The frequency generation circuit can generate a plurality of different output frequencies for supply to respective DAB and FM tuners (50, 60, 70). The frequency generation circuit can be used, together with a baseband circuit (14), in a radio receiver (1, 2). The same oscillator (10) and phase-locked loop circuit are used to drive the baseband circuit.Type: ApplicationFiled: January 19, 2007Publication date: July 29, 2010Applicant: FUTURE WAVES UK LIMITEDInventors: Mark Dawkins, Chung Kei Thomas Chan
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Publication number: 20100166114Abstract: A method of reducing d.c. offset comprises comparing the a first variable signal with a second variable signal, producing a control signal in dependence upon the comparison, providing the control signal to a charge pump for generation of a feedback signal, and varying the first signal and/or the second signal in dependence upon the feedback signal thereby reducing any difference between the d.c. level of the first signal and the d.c. level of the second signal.Type: ApplicationFiled: January 19, 2007Publication date: July 1, 2010Applicant: FUTURE WAVES UK LIMITEDInventor: Mark Dawkins
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Publication number: 20090251176Abstract: A circuit for deriving an output clock signal from an input clock signal, the output clock signal having a frequency which is 1/Nth of the frequency of the input clock signal, where N is an odd number. The circuit comprises a plurality of latches configured as a latch ring, the latches being arranged in successive pairs, each pair of latches comprising a first latch that switches on one of the rising or falling edge of the input clock signal, and a second latch that switches on the other of the rising or falling edge of the input clock signal. An RS flip flop is coupled to receive at one of its set and reset inputs an output from the latch ring that is switched on a rising edge, and at the other of the set and reset inputs an output from the latch ring that is switched on a falling edge. Said output clock signal is provided at an output of the RS flip flop.Type: ApplicationFiled: January 15, 2007Publication date: October 8, 2009Applicant: FUTURE WAVES UK LIMITEDInventor: Robin James Miller