Abstract: A low alpha-particle-emitting ceramic composite cover which when used in a ceramic integrated circuit package to encapsulate an integrated circuit device, reduces soft errors caused by alpha-particles emitted from the ceramic material. An alpha-particle-absorbing barrier layer is attached to the major portion of the interior surface of the ceramic cover to absorb alpha-particles emitted by the ceramic material. The barrier layer may be an organic polymeric material or an inorganic high purity material. Preferably the barrier layer is a polyimide film which is attached to the ceramic cover by a glass sealant material. Various constructions of the composite cover and ceramic integrated circuit packages utilizing the composite cover are disclosed.

Abstract: An array of electrically interconnected spaced electrical components on an apertured substrate wafer, each component being connected to terminal conductor pads on one surface of the substrate and to terminal conductor pads on the opposite surface of the substrate by thick film conductor strips which extend along the walls of the apertures is disclosed.

Abstract: A method of manufacturing a ceramic article having raised electrical contacts. Selected surfaces of the contacts are metallized. The method provides articles suitable for use in packaging electronic components and permits selective and controlled flow of solder during bonding operations.

Abstract: An array of electronic packaging substrates in horizontal and vertical rows in which each substrate has a plurality of internal and external terminals that are electrically interconnected is described. The array has (a) lines of separation along which the substrates may be separated from the array, (b) a plurality of adjacent rows of substrates with lines of separation therebetween that are spaced and parallel, and (c) at least a pair of metallized traces at least one of which runs between the spaced lines of separation, each of which is electrically connected to at least one external terminal in the adjacent rows of substrates and to a contact pad on the array. Selected terminals of substrates in the array are thus electrically connected to a contact pad whereby, after attachment of electronic components to the substrates, the components may be tested in an array format.