Patents Assigned to Global Power Technologies Group, Inc.
  • Publication number: 20210119042
    Abstract: A power semiconductor device includes a silicon carbide substrate and has at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The power semiconductor device further includes an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts. Each pit of the pattern of pits has a depth that extends short of the first layer.
    Type: Application
    Filed: December 29, 2020
    Publication date: April 22, 2021
    Applicant: Global Power Technologies Group, Inc.
    Inventor: James Albert Cooper, JR.
  • Publication number: 20200111904
    Abstract: A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The device includes a stop layer that is disposed at least in part laterally between the pits. The device further comprising an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts, wherein the ohmic metal contacts at least parts of the stop layer.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Applicant: Global Power Technologies Group, Inc.
    Inventor: James Albert Cooper, JR.
  • Patent number: 9780206
    Abstract: A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The device further comprising an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: October 3, 2017
    Assignees: Purdue Research Foundation, Global Power Technologies Group, Inc.
    Inventor: James Albert Cooper, Jr.
  • Patent number: 9613810
    Abstract: Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon carbide semiconductor device includes forming a thin epitaxial layer of a nitrogen doped SiC material on a SiC epitaxial layer formed on a SiC substrate, and thermally growing an oxide layer to form an insulator material on the nitrogen doped SiC epitaxial layer, in which the thermally grown oxide layer results in at least partially consuming the nitrogen doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen between the SiC epitaxial layer and the oxide layer.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: April 4, 2017
    Assignee: Global Power Technologies Group, Inc.
    Inventor: Michael MacMillan
  • Patent number: 9590067
    Abstract: Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon carbide semiconductor device includes forming a thin epitaxial layer of a nitrogen doped SiC material on a SiC epitaxial layer formed on a SiC substrate, and thermally growing an oxide layer to form an insulator material on the nitrogen doped SiC epitaxial layer, in which the thermally grown oxide layer results in at least partially consuming the nitrogen doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen between the SiC epitaxial layer and the oxide layer.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 7, 2017
    Assignee: Global Power Technologies Group, Inc.
    Inventor: Michael MacMillan
  • Patent number: 9276069
    Abstract: Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon carbide (SiC) device includes forming a thin layer of a protection material over a SiC substrate, in which the protection material has a lattice constant that substantially matches a lattice constant of SiC and the thin layer has a thickness of less than a critical layer thickness for the protection material over SiC to form a uniform interface between the protection material and SiC, forming a layer of an insulator material over the thin layer of the protection material, and forming one or more transistor structures over the insulator material.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 1, 2016
    Assignee: Global Power Technologies Group, Inc.
    Inventor: Utpal K. Chakrabarti
  • Patent number: 9219122
    Abstract: Methods, systems, and devices are disclosed for thermal processing of silicon carbide semiconductor devices. In one aspect, a method for fabricating a silicon carbide semiconductor device includes forming a thin epitaxial layer of a nitrogen and phosphorous co-doped SiC material on a SiC epitaxial layer formed on a SiC substrate, and thermally growing an oxide layer to form an insulator material on the nitrogen and phosphorous co-doped SiC epitaxial layer, in which the thermally growing the oxide layer results in at least partially consuming the nitrogen and phosphorous co-doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen and phosphorous between the SiC epitaxial layer and the oxide layer.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 22, 2015
    Assignee: Global Power Technologies Group, Inc.
    Inventors: Michael MacMillan, Utpal K. Chakrabarti