Abstract: A cellular radiotelephone (24) engages in a call over a bidirectional channel (32) involving a cellsite base station (68) within a cellular network (22). Upon receipt of a notice (46), a geographical location computer (20) is activated and transmits a call locate instruction identifying the bidirectional channel (32) to a plurality of dual channel receivers (56, 58, 60, and 61). The dual channel receivers (56, 58, 60, and 61) are then tuned to the bidirectional channel (32) and receive the forward (78) and reverse (82) location signals over forward and reverse directions of the bidirectional channel (32). A probable location of the cellular radiotelephone (24) is determined by measuring phase differences of the forward (78) and reverse (82) location signals at each of the dual channel receivers (56, 58, 60, and 61).

Abstract: An improved digital bidirectional communications transceiver in which the upstream and downstream portions of the frequency spectrum are allocated in response to transmission line conditions and impairments such as background noise, radio frequency interference (RFI), crosstalk and reflected signals. The movement of the upstream and downstream carrier frequencies are elastic in that they may be adjusted in near real-time involving methods for determining the signal quality parameter(SQP) of the received signal. The SQP is used to estimate the bit error rate (BER) margin on the received data and also takes into account the total signal to interference ratio (SIR), where the interference includes crosstalk, RFI, and residual echo from the neighboring upstream or downstream channel. Because the carrier frequencies of the upstream and downstream channels are being dynamically allocated, it is necessary to implement a robust carrier acquisition, recovery and lock algorithm.

Abstract: A multiple channel radio frequency repeater has a receive port for receiving an input signal from a first antenna and a transmit port for transmitting a frequency shifted output signal to a second antenna. An input bandpass filter is located at the input port. A low noise amplifier follows the input bandpass filter for amplifying all signals within the input bandwidth. A plurality of channel filters divide the input signal into a plurality of channel signals. A local oscillator generates a local oscillator (LO) signal. There is a mixer corresponding to each channel, each mixer has an input port, an output put port and an LO port. The LO port is coupled to the local oscillator. An Automatic Gain Control (AGC) amplifier is between each channel filter and each mixer for adjusting the channel signal level to the mixer input port to assure that each mixer has the same level amplified channel signal.

Abstract: A fuzzy-logic-based evidence fusion tool for predicting function levels of a switch in a telecommunications network. Confidence factors related to the geographical location and to the physical characteristics of the switch are acquired and mapped into fuzzy membership values. The membership values activate a set of fuzzy evidence fusion rules at each function level, and a degree of truth for each rule is inferred. A defuzzification scheme combines the degree of truth of each rule into a single combined confidence factor for each function level. Finally, the maximum combined confidence factor for each rule is determined, and the switch function level corresponding to that confidence factor is assigned to the switch.

Abstract: A combination of two phase-lock loops, and a cancellation circuit are used to remove a dominant FM signal from within a signal environment. The two phase-lock loops together produce a replica of the highest power (i.e. dominant) FM signal. The cancellation circuit uses this replica in a demodulation, notch-filtering, and remodulation process to excise the dominant FM signal, leaving the other signal(s) undisturbed. Potential applications include co-channel FM signal/interference cancellation and optimizing utilization of RF spectrum.

Abstract: An observed binary code sequence which has been corrupted by noise is operated upon to determine the configuration of a code generator capable of generating an equivalent code sequence. A method and apparatus is introduced to determine the code generator configuration based on rapid testing and elimination of a large set of hypothesis code generator configurations.

Abstract: A ball bearing/freewheel clutch is provided with an inner race member defining an inner race surface; an outer race member defining an outer race surface concentric with said inner race member; and a raceway between said inner and outer races. The inner and outer race members each have a series of short radially oriented sawtooth inclines on their respective inner and outer race surfaces at right angles to said raceway. A plurality of modified ball bearings are disposed in said raceway between said inner and outer race members, such that said modified ball bearings serve to prevent relative rotation of said inner and outer race members in one direction, and to transmit a torque between said inner and outer races. In the preferred embodiment of the invention, said modified ball bearings have flattened poles which engage said sawtooth inclines in one direction of rotation.

Abstract: A method and apparatus for detecting and measuring the code phase offset in bits and fractional bits, or the time delay in master clock cycles, between a reference binary pseudo-noise (PN) code sequence and a similar sequence of unknown delay. Rapid detection and measurement is achieved by utilizing parallel feed-forward logic and eliminating all feedback and variable delay circuitry. At the start of a new detection and measurement cycle, the current state of the A input sequence is stored and correlated with new B input stakes. Likewise the state of the B input sequence is stored and correlated with a new A input code states. After a time equal to the delay between the two input sequences, one of the correlators will produce an output. A time delay counter runs from the start of a new detection and measurement cycle and stops on the occurrence of a correlator output.

Abstract: A spread-spectrum clock circuit is applied to microprocessor or other clocked digital electronic equipment for the purpose of reducing spectral emissions residing at harmonic and subharmonic multiples of the clock frequency. This clock randomly varies the frequency of its output within a frequency constraint bound centered at the average clock frequency. The center frequency of the spread-spectrum clock is stable and is usable for timing and measurement applications. The spread-spectrum clock is a sealed, self-contained circuit module that can be applied to existing digital electronic equipment without modification.

Abstract: Circuit for recovery of a plurality of multipath direct sequence spread spectrum signal components received over a time span, wherein the multipath signal components are components of a signal generated from digital data comprised of data bits at a data bit rate modulated by a pseudo-noise code, consisting of a sequence of chips having a chip rate greater than the data bit rate, wherein the sequence of chips is a code repetition period equal or greater than the received time span of the multipath signal components. A plurality of correlators is provided. Each correlator has a first input for coupling to the multipath signal components, a second input, and an output. A pseudo-noise code generator generates a duplicate of the pseudo-noise code. A time delayer is coupled between the second inputs of a mulitiplicity of the correlators and the pseudo-noise code generator for delaying the duplicate of the pseudo-noise code by a multiple of a time delay equal to the time of a chip duration or less.

Abstract: A coupling network for coupling a signal at a frequency from a voltage source to a load. The voltage source has a source resistance. The load has a load resistance and a load reactance. The ratio of the load reactance to the load resistance greater than 100. The coupling network includes a reactive element and a delay circuit. The reactive element is arranged in series with the load to resonate with the load reactance at the frequency. The delay circuit is between the reactive element and the source, has a delay equivalent to a quarter wave length transmission line at the frequency and has a characteristic impedance equal to the square root of the product of the values of the load resistance and the source required resistance.

Abstract: Method of demodulating a signal including a plurality of time-dispersed signal components such as resulting from receiving in a multipath environment. A plurality of correlators are provided. The period of expected time uncertainty is scanned to identify the highest energy signal components. Each correlator is assigned to process one of the highest energy signal components. Each of the correlator outputs is pase corrected to compensate for carrier phase differences. The correlator outputs are coherently combined to provide a data output.

Abstract: Isochronous interface apparatus for transferring data from a source over a clocked channel to a destination. A channel input interface is interposed between the source and the channel. The channel input interface includes a data compressor adapted to compress the data with a compression ratio responsive to a signal. A first elastic buffer is coupled between the data compressor and the channel, having a first variable stack and providing a first signal representing the depth of the first variable stack. The first elastic buffer has an input coupled to the data compressor and has an output clocked by the channel and provides a signal representing the depth of the variable stack. The first signal is feedback to the data compressor for controlling the compression ratio of the data compressor. A channel output interface is interposed between the clocked channel and the destination. The channel output interface includes a data expander coupled to the channel.

Abstract: Method of transferring isochronous data from a source over a clocked channel to a sink. The data is compressed by a compression ratio responsive to a depth of a first variable stack. The compressed data is stored in the first stack and clocked by the channel. Compressed data on the channel is expanded and stored in a second variable stack. The variable stack is clocked to maintain the second variable stack at a constant depth.

Abstract: A correlator for processing a direct sequence spread spectrum communication system signal, wherein digital data comprised of data bits at a data bit rate is modulated by a first pseudo-noise code comprised of a sequence of chips having a pseudo-noise chip rate greater than the data bit rate, each chip having a chip period, the sequence repeating at a code period, and the pseudo-noise modulated data modulates a carrier resulting in the signal. A sampler produces digital samples of the signal. A pseudo-noise code generator produces a second pseudo-noise code replicating the first pseudo-noise code. Circuity time syncronizes the second pseudo-noise code to maximize a combined value of correlated signal energy, thereby time locking the first pseudo-noise code and the second pseudo-noise code.

Abstract: Method of processing a direct sequence spread spectrum communication system signal wherein digital data comprised of data bits is modulated by a first pseudo-noise code comprised of a sequence of chips, the pseudo-noise chip rate greater than said date bit rate, each chip having a chip period, said sequence repeating at a code period, and the pseudo-noise modulated data modualates a carrier frequency resulting in the signal. Digital samples are made of the signal. A second pseudo-noise code replicates the first pseudo-noise code. A first correlation is made of the sampled signal and the second pseudo-noise code. A second correlation is made of the sampled signal and the second pseudo-noise code delayed by one chip period. A first correlated signal energy value represents the signal energy of the first correlation. A second correlated signal energy value represents the signal energy of the second correlation.

Abstract: Apparatus for indicating the end of an acquisition procedure between a transmitter and receiver in a direct sequence spread spectrum communications system. A transmitter generates a first acquisition code having a first acquisition code period and comprised of digital bits at a first bit rate. A circuit modulates the first digital acquisition code by a pseudo-noise code repeating at a pseudo-noise code period and consisting of a sequence of chips at a chip rate greater than the first bit rate. The first acquisition code period is an integer multiple of the pseudo-noise code period. A circuit modulates a carrier by the first digital acquisition code modulated by the pseudo-noise code. The carrier modulated by said first digital acquisition code modulated by said pseudo-noise code is transmitted for a first period of time. A circuit synchronizes a receiver to the chip rate and carrier frequency. A circuit synchronizes the receiver to the pseudo-noise code period.

Abstract: Method for indicating the end of an acquisition procedure between a transmitter and receiver in a direct sequence spread spectrum communications system. At a transmitter, a first acquisition code having a first acquisition code period and comprised of digital bits at a first bit rate is generated. The first digital acquisition code is modulated by a pseudo-noise code repeating at a pseudo-noise code period and consisting of a sequence of chips at a chip rate greater than the first bit rate, and wherein the first acquisition code period is an integer multiple of the pseudo-noise code period. A carrier frequency is modulated by the first digital acquisition code modulated by the pseudo-noise code. The carrier is modulated by the first digital acquisition code modulated by the pseudo-noise code is transmitted for a first period of time.

Abstract: Method for carrier frequency correction in a direct sequence code division multiple access communication system having a carrier frequency, consisting of an expected carrier frequency and a carrier frequency error, modulated by a pseudo-noise code. A local frequency is produced equal to the expected carrier frequency. Received signals are demodulated of the pseudo-noise and mixed with the local frequency. The demodulated signals consist of in-phase signal components and quadrature signal components and the carrier frequency error. Each of the demodulated signal are converted to digital samples. Each signal digital sample is multiplied by stored digitized samples of a plurality of sinusoidal tones to produce a product corresponding to each tone. Each product corresponding to each tone is squared. The resulting squared products are compared to determine which squared product has the maximum value.

Abstract: A carrier frequency corrector for a receiver for use in a direct sequence code division multiple access communication system having a carrier frequency consisting of an expected carrier frequency and a carrier frequency error, modulated by a pseudo-noise code. A local frequency source provides a local frequency approximately equal to equal to the expected carrier frequency. A demodulator provides complex demodulated received signals stripped of the pseudo-noise code and mixed with the local frequency source. Each of the demodulated signals consists of in-phase signal components and quadrature signal components and the carrier frequency error. A sampler is coupled to the demodulator and converts the demodulated signal components to digital samples. A digital signal processor is coupled to the sampler and multiplies each signal component sample by stored digitized samples of a plurality of closely spaced sinusoidal tones to provide a product corresponding to each tone.