Abstract: A cryptography-based entity authentication device (EAD) operated by a remote entity located at a subscriber site enables a telephone switch or computer system to identify and verify the authenticity of the entity. In one embodiment, the EAD encrypts a random digital sequence transmitted by a host facility and returns the encrypted signal to the host for comparison with another encryption signal generated locally by the host. If a match is detected, this serves as confirmation that the remote entity possesses the same encryption key as the host, therefore verifying the authenticity of the remote entity. Otherwise, the entity is deemed fraudulent and access is denied. In another embodiment, the host and subscriber site each include a respective time generation means which are maintained in relative time synchronicity. The EAD generates and encrypts a time signal for comparison with another encrypted time signal generated locally by the host.

Abstract: A network interface module operably connected to a subscriber's television receiver and to a switched broadband digital network includes a fiber-compatible digital transceiver. A downlink receiver in the transceiver detects video/audio/data information that is time-multiplexed within a serially transmitted digital signal optically transmitted by the switched digital network as a broadband digital downlink channel. The detected information is decoded into a parallel format of video/data samples, audio samples, and recovered sample clock that are applied to a digital switch in the television receiver.

Abstract: A novel variable-size block multi-resolution motion estimation (MRME) scheme is presented. The motion estimation scheme can be used to estimate motion vectors in subband coding, wavelet coding and other pyramid coding systems for video compression. In the MRME scheme, the motion vectors in the highest layer of the pyramid are first estimated, then these motion vectors are used as the initial estimate for the next layer and gradually refined. A variable block size is used to adapt to its level in the pyramid. This scheme not only considerably reduces the searching and matching time but also provides a meaningful characterization of the intrinsic motion structure. In addition, the variable-MRME approach avoids the drawback of the constant-size MRME in describing small object motion activities. The proposed variable-block size MRME scheme can be used in estimating motion vectors for different video source formats and resolutions including video telephone, NTSC/PAL/SECAM, and HDTV applications.

Abstract: An Asynchronous Transfer Mode (ATM) cell alignment assembly aligns an incoming ATM cell within an internal time slot of an ATM matrix by controllably time-delaying the cell before being switched by the matrix. The alignment assembly includes a 53-byte-wide shift register having a serial input receiving the incoming ATM cell, and fifty-three parallel outputs each coupled to a respective input of a 53.times.8 programmable crosspoint switching array. Each output of the array is coupled to an input of a shift register having eight parallel inputs and a serial output coupled to a respective input of the ATM matrix. The crosspoint switching array establishes only a single selected switching path through the array in accordance with the desired time delay, and is reconfigured upon the arrival of each incoming ATM cell.

Abstract: A broadband space switch matrix includes a parallel combination of individual switch modules each comprising a cascade of pass-transistor selectors, NAND gates, and inverters arranged into a multi-stage tree multiplexing configuration. The switching speed is increased by isolating each switching crosspoint from the stray capacitive loading in the matrix.

Abstract: A solder geometry for epi-down diebonding an optoelectronic component to a heat sink platform includes a solder deposition pattern having exposure windows to create gaps or diebond bridges in the solder pattern. The active regions of the components are disposably registered within the gaps of the solder pattern.

Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal struutures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

Abstract: Apparatus for and method of communicating over a local area network is disclosed. Multiple nodes are connected by an optical fiber in a ring architecture. The cable supports multiple subcarrier multiplexed data communication channels for transmitting and receiving message data between the nodes and a control channel for partitioning nodal access to the individual data channels. Tokens are circulated on the control channel indicating the status of each data channel. A node desiring to send, acquires an open data channel by marking the corresponding control channel token to show that the selected data channel is no longer available, inserts the node destination address into the control channel token, and transmits data on the acquired data channel. A node recognizing its address in the control channel token's destination address field for a particular data channel tunes its receiver to accept data on that channel.

Abstract: In an optical heterodyne communication system for transmission of multiple optical channels at different wavelenths, the optical channels are grouped into blocks for increased utilization of the available bandwidth. The spacing between optical channels within a block is typically equal to or somewhat greater than the channel bandwidth. The spacing between blocks is such that when the optical signal is heterodyned with a local oscillator lightwave, the interference with a selected optical channel from adjacent blocks does not exceed a predetermined level.

Abstract: A process for scheduling a processor, in a stored program digital switch of a telecommunications network having heterogeneous types of task, utilizes preassigned probability parameters to schedule the tasks for the processor to serve to meet a system objective. For n types of tasks, each having one of n probability parameters P.sub.i where 0<P.sub.i <1, the system first serves a type i task, then if queue i is empty, it serves a type i+1 modulus (n) task. If queue i is not empty, with a probability P.sub.i it serves another type i task and with a probability 1-p.sub.i it serves a type i+1 task modulus (n) until a type i+1 task modulus (n) until a type i+1 task is served. Thus the processor continually cycles through all types of tasks.

Abstract: A junction field effect transistor, specifically a static induction transistor. The N-type source regions are formed as two zones. First, relatively lightly doped first zones are formed by ion-implanting doping material relatively deeply into the semiconductor material. Then relatively heavily doped second zones are formed by ion-implanting doping material to a relatively shallow depth within the first zones to leave portions of the first zones interposed between the second zones and the remainder of the semiconductor material. The resulting devices exhibit reduced gate-drain junction capacitance at low drain bias voltages thereby improving device capacitance linearity.

Abstract: Electrical circuitry of CMOS inverter circuits in cascade providing a compatible interface between ECL logic levels and CMOS logic levels. The ECL input is applied to the gate of the N-type transistor of the first inverter circuit. A threshold control circuit includes a CMOS inverter circuit with the gate of the N-type transistor connected to a reference voltage and the gate of the P-type transistor connected to its drain is connected to the gate of the P-type transistor of the first inverter circuit. The threshold control circuit adjusts the threshold voltage of the first inverter circuit so as to compensate for changes in current flow through the N-type or P-type transistors, thereby permitting operation over extreme variations in circuit parameters under situations of poor operating tolerances and wide temperature variations.

Abstract: The present invention describes a process for protecting aluminum nitride circuit substrates during electroless plating using a sol-gel technique. The aluminum nitride substrate is coated with a metal. The coated substrate is etched to form a circuit pattern thereby exposing the aluminum nitride. The etched substrate is placed in a solution of tetraethylorthosilicate and withdrawn. The substrate is dried in air and then baked in an oven to remove all of the organic solvents leaving a stoichio metric film of silica on the exposed substrate. The substrate is then placed in an electroless plating solution and the circuit pattern is plated to a predetermined thickness.

Abstract: A single phase superconducting oxide ceramic material in the form of highly oriented platelets, and a process for the production thereof. The process involves calcining in a non-reducing atmosphere a homogeneous mixture of stoichiometric proportions of suitable precursor materials. The calcination temperature is below the peritectic melt temperature of the superconducting material, and is at or above a temperature and for a time sufficient to effect partial melting of at least one of the precursor materials to a degree sufficient to effect diffusion of at least one of the precursor materials throughout the mixture. The calcination vessel is not wetted by melts of the precursor materials at the calcination temperature. The calcined material is then annealed in a non-reducing atmosphere. A typical material produced by the process is YBa.sub.2 Cu.sub.3 O.sub.x superconducting material, at a calcination temperature of about 976.degree.-982.degree. C.

Abstract: A heterostructure device includes a ridge-waveguide laser monolithically integrated with a ridge-waveguide rear facet monitor (RFM). An integral V-groove etched directly into the device substrate enables passive alignment of an optical fiber to the active region of the laser. The laser and RFM facets were formed using an in-situ multistep reactive ion etch process.

Abstract: A method for producing a superconducting copper oxide based helical resonator coil exhibiting improved quality factor, Q. A copper oxide based superconductor powder is mixed with a binder melt at about 45-65% solids by volume. The binder is an RCOOR' ester wax with R and R' each a long chain hydrocarbon group of at least 6 carbons. The ester wax has a melting point of about 40.degree.-100.degree. C. and a viscosity of about 94-2000 centipoise at its melting point. The binder/powder mixture is extruded and wrapped around a mandrel to form a helical coil. The coil is embedded in a setter powder and heated in an oxidizing atmosphere at up to about 2.degree. C./min to about 450.degree.-650.degree. C., and held for a time sufficient to remove the binder. The coil is then heated in the oxidizing atmosphere at up to about 3.degree. C./min to at least about 920.degree. C., and held at about 920.degree.-990.degree. C. for a time sufficient to achieve a density of at least about 93% of theoretical density.

Abstract: A base station in a cellular communications system is connected to a plurality of remote cellular sites by a communications link having a base terminal coupled to a remote terminal by two optical fibers. The base terminal receives RF downlink channels from the base station and optically transmits the RF channels as a non-overlapping composite signal to the remote terminal on a first fiber. The RF downlink channels are individually recovered at the remote terminal and distributed to disignated cell sites. The remote terminal also functions to receive RF uplink channels from the cell sites and optically transmit the RF channels as a non-overlapping composite signal to the base terminal on a second fiber. The RF uplink channels are indivicually recovered at the base terminal and forwarded to the base station.

Abstract: In one aspect of the present invention a capacitor is placed in series with the ballast and the lamp. The capacitor lowers the impedance during lamp starting and is shorted out when final arc conditions of the lamp are reached. Method and device for improvement of lumen maintenance of high intensity discharge lamps through minimizing the wall blackening during lamp starting is disclosed. Reducing the electrode material sputtering during the thermionic arc phase of the lamp starting process was achieved by decreasing the cathode fall voltage. The cathode fall voltage in these lamps was decreased by increasing the current flowing through during the starting phase. The increase of starting current was achieved by increasing the open circuit voltage or by decreasing ballast impedance.

Abstract: Electrical circuitry of CMOS inverter circuits in cascade providing a compatible interface between ECL logic levels and CMOS logic levels. The MOS transistors of the first inverter circuit of the series are approximately three times larger than the MOS transistors of the same type in subsequent inverter circuits of the series. The ECL input is to the gate of the N-type transistor of the first inverter circuit. A threshold control input is connected to the gate of the P-type transistor of the first inverter circuit. This configuration increases the operating speed of the first inverter circuit and permits controlling the threshold voltage in order to stabilize the output duty cycle.

Abstract: A process for producing a high critical temperature bismuth strontium calcium copper oxide superconducting material. An intimate mixture is formed of two superconducting materials. The first material is bismuth strontium calcium copper oxide or (bismuth, lead) strontium calcium copper oxide, and has a bulk critical temperature below about 90K. The second material is a seeding powder of bismuth strontium calcium copper oxide or (bismuth, lead) strontium calcium copper oxide, and includes at least 20 volume percent 2223 phase. The amount of seeding material added to the mixture is selected to result in an amount of 2223 phase in the mixture of about 2-50 weight percent. The mixture is annealed in an oxidizing atmosphere at a temperature of at least about 845.degree. C. and below the melting temperature of the 2223 phase, for a time sufficient to increase the amount of 2223 phase in the mixture.