Abstract: A system for testing circuits of digital data telecommunications networks provides selected physical and protocol testing on an integrated basis. Systems and test methods provide for analysis of test results to provide diagnosis of probable cause of actual or apparent faults related to data transmission and may also provide automatic implementation of additional diagnosis, followed by a second level of fault diagnosis using the additional test results. Display screens provide the results of fault analysis, provide comparative viewing of fault-free benchmark data and provide suggestions as to probable cause of faults. A central test unit portion of the system may be installed at a carrier's offices and testing may be controlled on a dial-up basis over telephone lines from a remote customer location using a personal computer as the test selection entry and information screen viewing device.

Abstract: A system for testing circuits of digital data telecommunications networks provides selected physical and protocol testing on an integrated basis. Systems and test methods provide for analysis of test results to provide diagnosis of probable cause of actual or apparent faults related to data transmission and may also provide automatic implementation of additional diagnosis, followed by a second level of fault diagnosis using the additional test results. Display screens provide the results of fault analysis, provide comparative viewing of fault-free benchmark data and provide suggestions as to probable cause of faults. A central test unit portion of the system may be installed at a carrier's offices and testing may be controlled on a dial-up basis over telephone lines from a remote customer location using a personal computer as the test selection entry and information screen viewing device.

Abstract: A system for testing circuits of digital data telecommunications networks provides selected physical and protocol testing on an integrated basis. Systems and test methods provide for analysis of test results to provide diagnosis of probable cause of actual or apparent faults related to data transmission and may also provide automatic implementation of additional diagnosis, followed by a second level of fault diagnosis using the additional test results. Display screens provide the results of fault analysis, provide comparative viewing of fault-free benchmark data and provide suggestions as to probable cause of faults. A central test unit portion of the system may be installed at a carrier's offices and testing may be controlled on a dial-up basis over telephone lines from a remote customer location using a personal computer as the test selection entry and information screen viewing device.

Abstract: In the particular embodiment of the invention described in the specification, a frame slip detector for a detecting frame slip in a 24 channel PCM transmission system using an 8 KHz frame rate supplies a 1 KHz test tone to one channel of the system. A phase shift detector detects phase shifts in the same channel and supplies them to a frame slip indicator which responds to phase shift signals within the range from 40 degrees to 50 degrees which recur at periodic intervals of at least one second and supplies corresponding indications of frame slip for each phase shift detected.

Abstract: A wide-band FM receiver for satellite-transmitted NTSC color television signals includes a novel tracking filter circuit for extending the noise threshold of the receiver. The tracking filter circuit includes a voltage steerable bandpass filter and a feedback control loop that provides a different loop gain for portions of the feedback signal having frequencies corresponding to the spectral components of the chrominance signal and for portions of the feedback signal having frequencies corresponding to the spectral components of the luminance signal. The control loop comprises a loop amplifier, a comb filter and a low-pass filter for separating the feedback signal according to frequency, and two attenuators to allow the setting of different loop gains for the two frequency-separated portions of the feedback signal.

Abstract: A balanced mixer for mixing a discrete approximation of a periodic, continuous signal with a periodic digital signal includes a Johnson counter providing a set of discrete signals suitable for generating a discrete approximation of the continuous signal by appropriately weighting and summing such discrete signals, a resistive weighting and summing network comprising a plurality of weighting resistors corresponding to the discrete signals and having one terminal connected to a summing node, and a plurality of EXCLUSIVE OR gates, each having one input connected to receive a respective one of the discrete signals, another input connected to receive the digital signal to be mixed and an output connected to the other terminal of the weighting resistor corresponding to the discrete signal received by the EXCLUSIVE OR gate.

Abstract: A measure of delay distortion produced in a circuit under test is provided by applying a purely amplitude-modulated carrier to the circuit and detecting the resulting phase modulation.

Abstract: The gain of an operational amplifier is switched between +K dB and -K dB by switching circuit positions of the input and feedback impedances. The gain is changed in 0.1 dB steps by changing either the input or feedback impedance by a ratio of 1.0116 for each step. The gain is changed in 1.0 dB steps by changing the other of the feedback or input impedance by a ratio of 1.122 for each step. A novel two-pole switching arrangement employs the foregoing techniques to permit unambiguous gain polarity changes.

Abstract: An intermodulation distortion analyzer generates two pairs of sinusoidal test tones to serve as a test signal for the channel under test. The two pairs of tones simulate two respective noise band test signals but eliminate the long time averaging required for measurements when noise bands are used. A highly linear AGC circuit employs sampling at an output-controlled duty cycle to maintain a constant reference level for the analyzer. This reference level permits automatic distortion measurements to be read out directly in db below the test signal. An RMS detector circuit for second order intermodulation products employs feedback control to maintain the input signal to a squaring circuit constant. Squaring of the constant level sinusoids produces RMS DC components which can be separated for direct measurement. A distortion circuit provides known levels of second and third order intermodulation in the test signal to permit accurate check out of the analyzer.

Abstract: A frequency converter circuit includes an input voltage-to-current converter which delivers signal current to a tuned IF circuit via a current steering circuit controlled by a local oscillator. In a preferred embodiment voltage-to-current conversion is effected without introducing unwanted harmonics by a double-gate MOSFET. Current steering is performed by a pair of push-pull connected transistors alternately driven into saturation by the local oscillator so that they alternately deliver signal current to the tank circuit in opposite senses. A current-limited diode clamps the output signal level in response to high input current levels to prevent over-driving an output filter.

Abstract: In a phase lock loop, the bandwidth of the phase error signal, when used for phase measurement outside the loop, is increased by summing the error signal with an integrated version of the VCO control signal derived from the loop filter circuit. The combined effect on the error signal of both the loop filter circuit and the integration provides a boost effect at low frequencies, which when summed with the unprocessed error signal results in a broadband measurement signal with a low frequency cut-off below the low-frequency cut-off of the loop itself. This technique permits extending the bandwidth of the measurement signal without affecting loop operation.

Abstract: An intermodulation distortion analyzer generates two pairs of sinusoidal test tones to serve as a test signal for the channel under test. The two pairs of tones simulate two respective noise band test signals but eliminate the long time averaging required for measurements when noise bands are used. A highly linear AGC circuit employs sampling at an output-controlled duty cycle to maintain a constant reference level for the analyzer. This reference level permits automatic distortion measurements to be read out directly in db below the test signal. An RMS detector circuit for second order intermodulation products employs feedback control to maintain the input signal to a squaring circuit constant. Squaring of the constant level sinusoids produces RMS DC components which can be separated for direct measurement. A distortion circuit provides known levels of second and third order intermodulation in the test signal to permit accurate check out of the analyzer.