Abstract: A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.
Type:
Grant
Filed:
June 20, 2022
Date of Patent:
January 2, 2024
Assignee:
HEXAGEM AB
Inventors:
Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus
Abstract: A semiconductor device including a nanostructure, including a planar layer of a III-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures, and semiconductor material which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, where the array of nanowire structures and the semiconductor material form a coherent layer.
Abstract: A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).
Type:
Grant
Filed:
October 5, 2018
Date of Patent:
July 19, 2022
Assignee:
HEXAGEM AB
Inventors:
Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus
Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.
Type:
Grant
Filed:
February 13, 2017
Date of Patent:
May 24, 2022
Assignee:
HEXAGEM AB
Inventors:
Lars Samuelson, Jonas Ohlsson, Zhaoxia Bi
Abstract: A semiconductor device including a nanostructure, comprising a planar layer (1020) of a Ill-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures (1010), and semiconductor material (1016) which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, wherein the array of nanowire structures and the semiconductor material form a coherent layer.
Abstract: GaN based nanowires are used to grow high quality, discreet base elements with c-plane top surface for fabrication of various semiconductor devices, such as diodes and transistors for power electronics.
Abstract: GaN based nanowires are used to grow high quality, discreet base elements with c-plane top surface for fabrication of various semiconductor devices, such as diodes and transistors for power electronics.