Abstract: A semiconductor apparatus having improved thermal fatigue life is provided by lowering maximum temperature on jointing members and reducing temperature change. A jointing member is placed between a semiconductor chip and a lead electrode, and a thermal stress relaxation body is arranged between the chip and a support electrode. Jointing members are placed between the thermal stress relaxation body and the chip and between the thermal stress relaxation body and the support electrode. A second thermal stress relaxation body made from a material having a thermal expansion coefficient between the coefficients of the chip and the lead electrode is located between the chip and the lead electrode. The first thermal stress relaxation body is made from a material which has a thermal expansion coefficient in between the coefficients of the chip and the support electrode, and has a thermal conductivity of 50 to 300 W/(m·° C.).

Abstract: A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

Abstract: An insulated gate transistor comprising a first semiconductor region, a second semiconductor region includes plural portions, a third semiconductor region, a fourth semiconductor region, a first insulation layer, control electrodes, a first main electrode, and a second main electrode, wherein a metallic wiring layer is provided on the first main surface plane via an insulating layer, plural regions insulated from the first main electrode are provided through said first main electrode, and the metallic wiring layer is connected electrically to the control electrode through the insulating layer via the region insulated from the main electrode.

Abstract: A motor driving system is disclosed. The circuit includes a power converter for supplying a brushless motor having a permanent magnetic rotor with pulse-width modulation controlled driving power, a magnetic-pole position detector for detecting a magnetic-pole position of the motor rotor, a speed detector for detecting a rotational speed of the motor according to an output signal of the magnetic-pole position detector, a speed controller for outputting a deviation of an output signal of the rotational speed detector from a speed instruction, an instruction signal generating circuit for generating a plurality of instruction signals in response to an output signal of the speed controller, a circuit for generating modulated waves by selecting one of the plurality of instruction signals according to the magnetic-pole position of the motor, and a driving ct for controlling the power converter by means of pulse width modulation according to the modulated waves.

Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being

Abstract: In order to provide a highly accurate and reliable temperature sensing circuit and method, a resistor (10a) having a positive temperature coefficient is connected between the gate terminal (4) and the insulated gate electrode (8a) of the voltage drive type semiconductor device (1a), and the temperature is sensed based on a voltage representing a voltage drop across the resistor in a circuit portion between the gate terminal (4) and the other terminal (5).

Abstract: In a CMOS noise eliminating circuit, a plurality of PMOS transistors or NMOS transistors are connected in series so as to cause of switching speeds or switching timings of the PMOS transistors or the NMOS transistors, which are connected in series, to differ from each other, thereby improving the noise-resistant performance of a semiconductor integrated circuit.

Abstract: A driver circuit wherein a first switching element and a second switching element are totem-pole-connected, wherein the totem pole connection is connected at its one end, node and other end with a power source, an output to a load and a reference potential, respectively, wherein the first switching element is connected between the one end and the node, wherein the second switching element is connected between the node and the other end, and wherein a third switching element is connected between the one end of the totem pole connection and the control terminal of the first switching element.

Abstract: The communication control device allows a plurality of data items to be transferred to and from external devices, such as a CPU and a memory, via an external bus having a different data bus width in DMA (direct memory access) transfer mode. DMA transfer is controlled by the DMA controller provided in the communication control device. The DMA controller produces a signal indicating that a plurality of data items are continual.

Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being

Abstract: For a semiconductor circuit having one or more semiconductor devices, such as an IGBT, a turn-ON prevention circuit is provided for each device which prevents the device from turning ON during OFF times thereof, due to the presence of a transient voltage (dV/dt) across the main terminals of the device. In accordance with such a scheme, a MOSFET is connected between the insulated-gate electrode and emitter of the IGBT, and a capacitor, for example, is connected between the gate of the MOSFET and a sufficient electric potential to thereby effect a temporary turn-ON of the MOSFET to remove parasitic charge build-up in the IGBT before such charge build-up has reached a potential of the turn-ON threshold of the IGBT during OFF times of the IGBT. The capacitance element can be constituted by a MOSFET, namely, the capacitance across the gate-to-drain of an additional MOSFET.

Abstract: A high reliability electric power control semiconductor device with a prolonged product lifetime has been provided by successfully suppressing the metal support plate or the metal heat dissipation plate from warping due to the thermal stress during bonding so as to prevent the occurrences of cracks and gaps in the brazing fillers in the bonded layers between the metal heat dissipation plate or the metal support plate and the insulation plate in the semiconductor device comprising the semiconductor elements, metal heat dissipation plate, thermal stress buffer, insulation plate, and the metal support plate, wherein at least one of the metal heat dissipation plate and the metal support plate comprises a copper alloy of which a softening temperature at which a hot hardness of which becomes 1/2 of the hardness at the room temperature is 350.degree. C. or more.

Abstract: A gate turn-off thyristor including: an n-type emitter semiconductor layer divided into a plurality of n-type areas; a p-type base semiconductor layer which cooperates with the n-type emitter semiconductor layer to form a first main circular surface; an n-type base semiconductor layer; and a p-type emitter semiconductor layer cooperating with the n-type base semiconductor layer to form a second main circular surface. An outer diameter of the p-type emitter semiconductor layer is smaller than that of the n-type emitter semiconductor layer. A first main electrode put in low resistance contact with the n-type emitter semiconductor layer is formed on the first main surface. A second main electrode put in low resistance contact with the p-type emitter layer and the n-type base semiconductor layer is formed on the second main surface. A control electrode is formed in the p-type base semiconductor on the first main surface.