Patents Assigned to Hitachi Plasma Patent Licensing Co., Ltd.
  • Patent number: 7755573
    Abstract: A charging/discharging apparatus (602) for charging a capacitance to be charged/discharged (Cp) includes: a recovery capacitor (Cr1) for recovering electric energy which has one terminal connected to a first power supply (GND) through first switch means (SW11) and another terminal connected to a second power supply (Vs+Vo) through second switch means (SW12); first path forming means (D11) which has one terminal connected to a connection point between the second power supply and the other terminal of the recovery capacitor and another terminal connected to the capacitance to be charged/discharged, and charges the capacitance to be charged/discharged through a resonant inductor (L1) when the first switch means is turned on; second path forming means (D12) which has one terminal connected to a connection point between the first power supply and the one terminal of the recovery capacitor and another terminal connected to the capacitance to be charged/discharged, and discharges the capacitance to be charged/discha
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: July 13, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd
    Inventors: Yoshiho Seo, Kazushige Takagi, Tadayoshi Kosaka, Hajime Inoue, Koichi Sakita
  • Patent number: 7719487
    Abstract: A method of driving a gas discharge device for displaying a frame with gradation. A charge producing voltage and a charge adjusting voltage are successively applied in an address preparation period to respective subfields.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: May 18, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 7705806
    Abstract: A method for driving a plasma display panel, including a plurality of display electrode pairs and a plurality of address electrodes, and which includes at least an address period and a sustain discharge period. In the address period, performing address processing, between the address electrodes and a display electrode configured as either a set of odd or even numbered display electrodes, sequentially to all of one of the sets of display electrode pairs, and thereafter address processing, between the address electrodes and a display electrode configured as the other set of display electrode pairs, sequentially to all of the other set of display electrode pairs. In the sustain discharge period, supplying at least one first sustain discharge pulse to the one set of display electrode pairs, and supplying at least one second sustain discharge pulse to the other set of display electrode pairs.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 27, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 7675484
    Abstract: A method for driving an AC type surface-discharge display device which has cells arranged in a matrix. Each of the cells has at least three electrodes including a pair of main electrodes on every line of the matrix and an address electrode on every column of the matrix. The method includes providing an address preparation period applying a charge producing pulse and applying a charge adjusting pulse. The charge adjusting pulse has a waveform monotonously falling from a reference potential and a negative polarity and is applied to the second main electrode used as a scan electrode and generates feeble electric discharges between the first and second main electrodes. The feeble electric discharges are accompanied by a decrease of the wall voltage formed by the charge producing pulse.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: March 9, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 7592976
    Abstract: A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: September 22, 2009
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Shigetoshi Tomio, Naoki Matsui, Shinpei Yao
  • Publication number: 20090213108
    Abstract: A surface-discharge type PDP includes plural electrode pairs formed of first and second sustain electrodes arranged on a first substrate. Each pair extends along a line direction, and the first and second sustain electrodes are in parallel and adjacent to each other. Plural address electrodes arranged on a second substrate opposing the first substrate via a discharge space, each extending along a row direction, a matrix corresponding to a screen to be displayed is formed with the main electrodes and address electrodes, the address electrodes are orthogonal to the main electrodes, each of the address electrode is divided into, for example two partial address electrodes separated from each other by a border line located between adjacent main electrode pairs, whereby the screen is divided into two partial screens, wherein a first clearance between the partial address electrodes is substantially larger than a second clearance between main electrode pair adjacent across the border line.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 27, 2009
    Applicant: HITACHI PLASMA PATENT LICENSING CO., LTD.
    Inventors: Seiki Kuroki, Nguyen Thanh Nhan
  • Patent number: 7495636
    Abstract: A surface-discharge type PDP includes plural electrode pairs formed of first and second sustain electrodes arranged on a first substrate. Each pair extends along a line direction, and the first and second sustain electrodes are in parallel and adjacent to each other. Plural address electrodes arranged on a second substrate opposing the first substrate via a discharge space, each extending along a row direction, a matrix corresponding to a screen to be displayed is formed with the main electrodes and address electrodes, the address electrodes are orthogonal to the main electrodes, each of the address electrode is divided into, for example two partial address electrodes separated from each other by a border line located between adjacent main electrode pairs, whereby the screen is divided into two partial screens, wherein a first clearance between the partial address electrodes is substantially larger than a second clearance between main electrode pair adjacent across the border line.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 24, 2009
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Seiki Kuroki, Nguyen Thanh Nhan
  • Patent number: 7455562
    Abstract: A material for manufacturing a display panel substrate assembly having at least an electrode and a dielectric layer covering the electrode on a glass substrate, the material including an electrode material containing an electrically conductive particle and a binder resin having a thermal degradation temperature T1, and a dielectric material containing a binder resin having a thermal degradation temperature T2 and a low melting point glass having a glass softening point Tb, wherein the thermal degradation temperatures T1 and T2, and the glass softening point Tb have a relationship of T2<T1<Tb.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: November 25, 2008
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Osamu Toyoda, Kazunori Inoue
  • Patent number: 7423614
    Abstract: An address pulse width is reduced so that a display period for driving a plasma display panel (PDP) can be made longer. The PDP comprises cells, each cell having first and second electrodes covered with dielectric and a third electrode covered with dielectric disposed in a direction crossing the first and second electrodes. A method of driving the PDP comprises addressing ones of the cells to be illuminated for displaying, by applying, between the second and third electrodes of the respective cells to be illuminated, a preparatory address pulse having a pulse width that produces no discharge, and by subsequently applying therebetween main address pulses, each main address pulse having a pulse width that produces discharge.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: September 9, 2008
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Hitoshi Hirakawa, Manabu Ishimoto, Kenji Awamoto
  • Patent number: 7248234
    Abstract: In order to reduce aliasing as much as possible in a display apparatus that has a delta arrangement type screen, an image filter for performing a neighborhood operation is incorporated as a previous stage of a screen driving circuit. The image filter realizes low pass filtering including space frequency limitation in the diagonal direction that is suitable for a display on the delta arrangement type screen. Coefficients that constitute the filter matrix are optimized so that frequency components that exceed a Nyquist limit in the delta arrangement are suppressed. Coefficients that give optimal filter characteristics for any scale of filter matrix are defined by an expression.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: July 24, 2007
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd.
    Inventors: Yasunobu Hashimoto, Katsuya Irie, Kenji Awamoto