Abstract: An apparatus and a method for detecting a motor rotor position are provided. The method for detecting a motor rotor position includes: transmitting test current commands and preset angles to a field oriented control circuit before a motor rotor rotates, to enable the field oriented control circuit to generate feedback currents, determining current peaks of the feedback currents, and comparing the current peaks of the feedback currents, and when determining that a current peak of a feedback current with a largest current peak in the feedback currents is greater than a current peak of another feedback current, outputting, according to a largest current peak current command corresponding to the feedback current with the largest current peak, a preset angle corresponding to the largest current peak current command as an initial angle position of the motor rotor.

Abstract: A whole blood measurement method associated to hematocrit (HCT) and a whole blood measurement circuit thereof is applied in the detection of HCT of a whole blood sample to be tested. Herein, a time to digital converting circuit (TDC) is used for counting charging time or discharging time of a fixed capacitor and a to-be-tested sample, and a capacitance difference that is related to HCT is generated according to the charging time or the discharging time, so as to provide a reference for a whole blood feature test.

Abstract: A whole blood measurement method associated to hematocrit (HCT) and a whole blood measurement circuit thereof is applied in the detection of HCT of a whole blood sample to be tested. Herein, a time to digital converting circuit (TDC) is used for counting charging time or discharging time of a fixed capacitor and a to-be-tested sample, and a capacitance difference that is related to HCT is generated according to the charging time or the discharging time, so as to provide a reference for a whole blood feature test.

Abstract: A whole blood measurement method associated to hematocrit (HCT) and a whole blood measurement circuit thereof is applied in the detection of HCT of a whole blood sample to be tested. Herein, a time to digital converting circuit (TDC) is used for counting charging time or discharging time of a fixed capacitor and a to-be-tested sample, and a capacitance difference that is related to HCT is generated according to the charging time or the discharging time, so as to provide a reference for a whole blood feature test.

Abstract: A whole blood measurement method associated to hematocrit (HCT) and a whole blood measurement circuit thereof is applied in the detection of HCT of a whole blood sample to be tested. Herein, a time to digital converting circuit (TDC) is used for counting charging time or discharging time of a fixed capacitor and a to-be-tested sample, and a capacitance difference that is related to HCT is generated according to the charging time or the discharging time, so as to provide a reference for a whole blood feature test.

Abstract: For improving the brightness decay of a display due to its aging, a non-volatile memory such as Flash can be used to store a brightness accumulation value of each point of the display, and each point can be compensated for its brightness accordingly. However, the non-volatile memory suffers from incorrect write-in data or temporary power disconnection, and thus the error will exist all the time to make the display non-even. Hence, the present invention uses a multiple data backups and CRC error detection, plus new/old data comparison to protect data the non-volatile memory from incorrect brightness compensation value so as to uniform the brightness of the display.

Abstract: The present invention provides a memory device and a method for accessing the memory device thereof. The memory device comprises an address encoding selector for selecting one of plurality of encoding circuits which encodes a first address into a second address, and a data decoding selector for selecting one of plurality of decoding circuits which decodes a first data corresponding to the second address into a second data and a non-volatile memory, coupled to address encoding selector and the data decoding selector, for storing the first data. The method for accessing the memory device comprises encoding a first address into a second address by an address encoding selector, and decoding a first data corresponding to the second address into a second data by a data decoding selector, wherein the first data being stored in the non-volatile memory.

Abstract: For improving the drawback of brightness decay of a display due to aging, a memory can be used to store the usage time of each pixel of the display, then based upon the usage time the brightness decay of each pixel of the display can be compensated and accordingly the value for the compensation can be stored in a volatile memory and a non-volatile memory. However, the usage of the non-volatile memory is limited. Hence, the present invention discloses a new approach for storing the data so as to decrease write-in sequence per unit area for the non-volatile memory rather than increasing its storing capacity proportionally.

Abstract: An image-clock adjusting circuit is provided and includes a phase comparator, a clock controller, and a timing generator. The phase comparator receives a power source signal and a vertical synchronous signal and compares a phase of the power source signal with that of the first vertical synchronous signal for producing at least a phase comparison signal. The clock controller receives the phase comparison signal and the vertical synchronous signal, produces a pixel clock signal and intermittently adjusts a clock width of the pixel clock signal. The timing generator receives the pixel clock signal and adjusts the vertical synchronous signal into an adjusted vertical synchronous signal being nearly in phase with the power source signal. Therefore, The effect suppressing the phenomenon of the color rolling with the simpler circuit is accomplished.

Abstract: A signal processing method is provided and includes the following steps. A first synchronizing signal having a synchronizing frequency and a next expected pulse with an expected rising edge is provided. A second synchronizing signal having a selected frequency being within a frequency range is produced when the synchronizing frequency of the first synchronizing signal is out of a frequency range. A third synchronizing signal having a first pulse with a first rising edge is produced when the synchronizing frequency is within the frequency range, wherein the first rising edge is produced at an expected time point. Whether the next expected pulse appears in a period from the expected time point to a certain time point is detected as a detecting result. And a first falling edge of the first pulse is produced based on the detecting result. A picture-field flicker phenomenon of an LCD is eliminated through the method.

Abstract: The present invention mainly relates to a current limiting circuit, also known as over-current protection circuit, and a power regulator using the same. The purpose for the circuit is to protect the power device and the loading circuit for the power regulator. The conventional current limiting circuit takes advantage of a resistor and a MOS to convert the detected over current into a voltage and then turn on a P-typed MOS to clamp the gate voltage of a power transistor so as to achieve the goal of current limiting. However, the process variation for the resistor and said MOS and their temperature variation lead to a significant error to the limiting current. The present invention, therefore, takes advantage of the current comparison to enhance the accuracy for the current limiting circuit.

Abstract: A compensation method devoid of operating voltage calibration, establishing fundamental linearity calibration table and inputting, and detecting the actual operating voltage is disclosed. The compensation method comprises the steps of: a) turning off a switch in a touch sensor system; b) initializing the touch sensor system and measuring a reference frequency outputted from a oscillator in the touch sensor system; c) turning on the switch and measuring a first frequency outputted from the oscillator; and d) deducting the first frequency from the reference frequency so as to obtain a frequency difference; and e) comparing the difference with a predetermined value, and judging based upon the difference if the touch sensor system is touched by a foreign object.

Abstract: The present invention discloses a control apparatus, which not only accepts multiple dimming control signals, but also combines the signals in analog manner. By means of this, an inevitable analog to digital converter in a conventional voltage multiple dimming control apparatus can be saved without hurting the performance of generation of pulse width modulation signals. Compared with the conventional arts, the present invention further exhibits reduction in view of chip size and power consumption.

Abstract: The invention provides a capacitive touching apparatus, which includes at least an equivalent capacitor module, a first comparator, a first reference current generator, a first detection capacitor module and a selection switch module. The equivalent capacitor module receives a periodic driving signal and produces an output voltage according to the driving signal. The first comparator compares the output voltage with a first reference voltage and thereby produces a first comparison result. The first reference current generator produces a first reference current and a second reference current according to a base current, in which the first reference current generator decides whether to respectively output the first reference current and the second reference current according to the first comparison result, and the first reference current is output to the equivalent capacitor module. The first detection capacitor module produces a first detection output signal according to the second reference current.

Abstract: The present invention discloses a synchronizing device for real-time USB audio data transmission, comprising: a first adder unit, a start-of-frame countdown unit, a phase-locked loop circuit, a frequency divider, a second adder unit, a third adder unit, a fourth adder unit, a frame calibrating register unit, a calibrating mapping unit and a calibrating pulse generating unit. A start-of-frame token sent by the USB host is used as a 1-ms reference cycle so that a high-frequency clock passes through the frequency divider to issue a first clock. The first clock signal has a constant clock number in a USB start-of-frame. The absolute time is automatically adjusted according to the duration of a previous start-of-frame. Therefore, asynchronicity of data transmission between the USB host and external devices can be overcome.

Abstract: The present invention mainly relates to a voltage regulator, comprising: a P typed power MOS; a feedback circuit; a differential amplifier; a protecting circuit having a N-typed transistor current mirror; and an active foldback current limiting circuit rather than using a resistor. When the P typed power MOS is under short circuit current situation, the current at the output side of the current mirror is increased in order to limit the current flown through the power MOS. Meanwhile, the same purpose can also be served by increasing the current at the input side of the DC current mirror.

Abstract: Disclosed is a Power Factor Correction Controller, which comprises a boost converter, a current sensing unit, an arithmetic unit, and a switch driving unit. The current sensing unit can sense or derive the current that pass through the energy delivery device, which is normally implemented by a diode or a switch. The current sensing unit can also sense the inductor current, or the switch current. With the current sensing unit, the arithmetic unit can calculate the optimum switch on-time or when to turn off the switch, without direct-sensing of the load. The disclosed method reduces the system cost by removing the needs to sense the load condition as in the prior arts. The disclosed method also improves the system response by sensing the delivered current at energy delivery side, rather than the receiver side as in the prior arts.

Abstract: An oscillation tuning circuit is provided and includes a first circuit. The first circuit receives an input data stream with a known time interval, producing a first output signal having a first period, determines a first error signal representing a difference between the known time interval and a measured duration of the known time interval, determines a reference error signal according to a predetermined multiple of the first period, and adjusts the first period according to the first error signal and the reference error signal, wherein the known time interval is associated with a period between a first occurrence of and a second occurrence of a predetermined bit pattern in the input data stream.

Abstract: A two-wire serial handshaking communication interface and a method thereof is provided for a transmission of a data bit representative between a first transmitting component and a second transmitting component, wherein the first transmitting component includes a first input/output unit and a second input/output unit and the second transmitting component has a third input/output unit and a fourth input/output unit, wherein the first input/output unit and the second input/output unit transmit a first signal through a first transmitting line electrically connected therebetween and the third input/output unit and the fourth input/output unit transmit a second signal transmitted through a second transmitting line electrically connected therebetween without strict constraint on communication timing.

Abstract: A universal series bus (USB) frequency synchronous apparatus using a start of frame (SOF) signal generated by a master device to mark a reference interval is disclosed. The frequency synchronizing apparatus includes a frequency divider, a counter unit with a default pulse number, an arithmetic unit, and an adjusting unit. The frequency divider divides a high frequency signal by a variable frequency factor to generate a lock frequency signal. The counter is used to detect a pulse number of the lock frequency signal at a reference interval and obtain a pulse difference between the default pulse number and the detected pulse number of the lock frequency signal.