Abstract: A self-locking arrangement for a motor and a linear actuator which relates to motors. The motor has a self-locking capability, a good stability, a low noisy during operation, and a good user experience. The self-locking arrangement includes an end cap mounted on the motor and a friction ring sleeved over a drive shaft of the motor, a notch being provided on the friction ring, a limiting portion being provided at an outer periphery of the friction ring, the end cap being fitted with the limiting portion, so that the friction ring clasps the drive shaft in a case where the drive shaft rotates along a first direction.

Abstract: A method of managing operation commands for a flash memory includes: providing a first command queue for receiving and storing a plurality of normal operation commands; providing at least one word line read (IWLR) command queue for receiving and storing a plurality of IWLR operation commands; issuing a lock state command between each two consecutive IWLR operation commands to the at least one second command queue; determining a selected command queue from the first command queue and the at least one IWLR command queues according to the lock state command; and delivering an operation command from the selected command queue to the flash memory.

Abstract: A self-locking mechanism for a gearing arrangement, a gearing arrangement, an actuator, and a lifting platform, which relate to the technical field of lifting tables. The self-locking mechanism includes a casing, a self-locking gear, and a brake member, the self-locking gear meshing with the gearing arrangement, the brake member being connected between the casing and the self-locking gear; in a case where the gearing arrangement pushes the self-locking gear forwardly, the brake member releases the self-locking gear, and in a case where the gearing arrangement pushes the self-locking gear reversely, the brake member brakes the self-locking gear.

Abstract: A method for performing a test upon a flash memory module includes: performing data writing upon a plurality of first blocks of a first group in the flash memory module; reading the plurality of first blocks of the first group to determine whether there is any abnormal block in the plurality of first blocks and generating a first test result; after the plurality of first blocks are read, performing data writing upon a plurality of second blocks of a second group in the flash memory module; and reading the plurality of second blocks of the second group to determine whether there is any abnormal block in the plurality of second blocks and generating a second test result.

Abstract: A data storage device with flash memory. The controller receives a mode selection command from a host. In response to the mode selection command, the controller sends a ready-to-transfer message to the host, to further receive a data out message from the host that is sent by the host in response to the ready-to-transfer message. The ready-to-transfer message and the data out message are UFS protocol information unit (UPIU) messages. The data out message is arranged to rewrite a first mode page setting among a plurality of mode page settings of firmware stored in the flash memory. In response to the data out message, the controller determines whether the data out message will change mode parameters which cannot be rewritten in the first mode page setting, to adopt or refuse new mode parameters issued through the data out message for the first mode page setting.

Abstract: A self-propelled, one-wheeled vehicle may include a suspension system configured to dampen up and down motion of a board relative to the axle of a central wheel assembly when the vehicle encounters obstacles and bumps on a riding surface. Illustrative suspension systems include a shock absorber, a rocker, a pushrod, bell cranks, and/or a swingarm that couple the axle to the board. The suspension system may be disposed completely below a foot deck of the vehicle.

Abstract: Methods and systems are disclosed for sending a first parameter of a plurality of parameters to a third dedicated address of a plurality of addresses in memory, updating a parameter flag value in a first dedicated address in memory, updating a cyclic redundancy check (CRC) value for the parameter flag in a second dedicated address in memory, writing a first parameter value for the first parameter in the third dedicated address and updating the CRC value of the first parameter to a fourth dedicated address in memory, sending a second parameter to a fifth dedicated address of the plurality of addresses in memory, writing a second parameter value for the second parameter in the fifth dedicated address and updating the CRC value of the second parameter in a sixth dedicated address, and identifying a monitoring result between read values and expected values.

Abstract: A solution for deteriorated non-volatile memory is shown. When determining that raw data read from the non-volatile memory is undesirable data, the controller updates a deterioration table to record a deteriorated logical address of the raw data that is the undesirable data. In response to a read request that a host issues to read the non-volatile memory for data of the deteriorated logical address, the controller obtains the deteriorated logical address from the deterioration table and informs the host that deterioration has happened at the deteriorated logical address.

Abstract: A ball retainer is provided. The ball retainer includes a chain belt, a hook portion, and a recess portion. The chain belt has a first end and a second end. The hook portion is disposed at the first end. The recess portion is disposed at the second end. An outer circumferential side and an inner circumferential side are formed after the hook portion of the ball retainer is snapped into the recess portion. During operation of the ball retainer after the hook portion is snapped into the recess portion, an acting force is applied to the chain belt so that the hook portion is disengaged from the recess portion. During operation of the ball retainer after the acting force disappears, the first end and the second end of the chain belt approach each other so that the hook portion is accordingly snapped into the recess portion.

Abstract: A system that mirrors motion of a physical object by displaying a virtual object moving in a virtual environment. The mirroring display may be used for example for feedback, coaching, or for playing virtual games. Motion of the physical object is measured by motion sensors that may for example include an accelerometer, a gyroscope, and a magnetometer. Sensor data is transmitted to a computer that calculates the position and orientation of the physical object and generates a corresponding position and orientation of the virtual object. The computer may correct or adjust the calculations using sensor data redundancies. The virtual environment may include constraints on the position, orientation, or motion of the virtual object. These constraints may be used to compensate for accumulating errors in position and orientation. The system may for example use proportional error feedback to adjust position and orientation based on sensor redundancies and virtual environment constraints.

Abstract: A flash memory controller is arranged to access a flash memory module, and includes a transmission interface circuit a buffer memory, and a microprocessor. The transmission interface circuit is coupled to a host device, wherein the transmission interface circuit includes a command processing circuit, and the command processing circuit is arranged to: receive a command from the host device; utilize multiple check items to check the command to generate at least one check result; and convert the command to generate a converted command of a specific format, wherein the converted command comprises an error state field for recording the at least one check result. The buffer memory is arranged to store the converted command. The microprocessor is arranged to read the converted command from the buffer memory, and access the flash memory module according to the converted command.

Abstract: A flash memory controller is arranged to access a flash memory module, and includes a transmission interface circuit, a buffer memory, and a microprocessor. The transmission interface circuit is coupled to a host device, wherein the transmission interface circuit includes a command processing circuit, the command processing circuit is arranged to receive a command from the host device and convert the command to generate a converted command of a specific format, the command supports multiple formats, and the specific format is different from the multiple formats. The buffer memory is arranged to store the converted command. The microprocessor is arranged to read the converted command from the buffer memory, and access the flash memory module according to the converted command.

Abstract: An electromechanical vehicle height adjustment unit comprises an upper spring pad operative to support an upper end of a vehicle spring, a top mount that is displaceable relative to the upper spring pad, and a displacement mechanism coupled to the upper spring pad and the top mount and operative to displace the top mount relative to the upper spring pad in a height direction. The displacement mechanism comprises a rotary-to-linear motion conversion mechanism and an electric motor.

Abstract: A retractable step and side bar assembly that can be used for raised vehicles, such as trucks. The retractable step can be configured to provide for significant reach in a deployed position to allow for a user to enter the raised vehicle. Further, in the stowed position the retractable step can be located within the side bar, thereby providing a low profile as well as an enhanced aesthetic appearance.

Abstract: A container for beverage has a container body and a pressing member. The pressing member has a pair of guide grooves concavely formed to guide the user's fingers on two sides of the outer surface of the pressing member. The pressing member has a discharge hole positioned facing a nozzle from the container body so that the beverage contained in the container discharges through the nozzle and through the discharge hole when the pressing member is pressed towards the container body. The container body is ideal for containing coffee and pressurized gas to eject the coffee into a cup for enjoyment.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for executing host commands. The method performed by a processing unit includes: setting a first start register and a first end register to store a first logical address range from a first start logical address to a first end logical address for an execution of a host command; providing a sequential update queue including multiple entries; setting an activation register to drive a search engine; checking values of a matching register and a resulting address register of the search engine to determine whether a whole or a portion of data of the first logical address range is temporarily stored in the RAM after a time period; and if so, manipulating the whole or a portion of data of the first logical address range that is temporarily stored in the RAM.

Abstract: A control method of a memory device includes: controlling a flash memory controller to transmit a command to a flash memory module; determining whether the flash memory controller is in an idle state; in response to the flash memory controller being in the idle state, determining whether an idle time of the idle state exceeds a threshold value, wherein the threshold value is less than a time required for the flash memory module to complete executing a write command or an erase command; and in response to the idle time exceeding the threshold value, controlling the flash memory controller to enter a power saving mode to turn off a part of components in the flash memory controller.

Abstract: The invention relates to an apparatus for searching for logical address ranges of host commands. The first comparator outputs logic “0” to the NOR gate when a first end logical address is not smaller than a second start logical address. The second comparator outputs logic “0” to the NOR gate when a second end logical address is not smaller than a first start logical address. The NOR gate outputs logic “1” to a matching register and an output circuitry when receiving logic “0” from both the first and the second comparators. The output circuitry outputs a memory address of a random access memory (RAM) storing a second logical address range from the second start logical address to the second end logical address to a resulting address register when receiving logic “1” from the NOR gate.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.

Abstract: A memory controller coupled to a memory device and configured to control access operations of the memory device includes a data protection engine and a microprocessor. The data protection engine is configured to generate protection information according to data received from a host device. The microprocessor is configured to detect a status of the memory device in response to one or more write operations for writing the data to the memory device, determine whether a portion of the data has to be excluded when generating the protection information corresponding to the data according to the status and accordingly generate a determination result, and store the protection information and the determination result together in the memory device. The determination result indicates which portion of the data is utilized to generate the protection information.