Patents Assigned to Indigo Systems Corporation
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Patent number: 7050107Abstract: An interface device connects a camcorder to a camera operating in the non-visible electromagnetic spectrum to form a portable unitary system. The interface device provides a mechanical connection between the camcorder and the camera. A video cable carries video image data from the camera to the camcorder. A control connection additionally may be provided between the camcorder and the camera through the interface device, to allow the camera to be controlled through controls on the camcorder itself. A power connection may be provided between the camcorder and the camera through the interface device, to allow the camera to draw power from the camcorder.Type: GrantFiled: July 13, 2001Date of Patent: May 23, 2006Assignee: Indigo Systems CorporationInventors: Jeffrey D. Frank, Jeffrey Lynn Heath, Eugene Timothy Fitzgibbons
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Patent number: 7034301Abstract: Systems and methods for microbolometer focal plane arrays are disclosed. For example, in accordance with an embodiment of the present invention, microbolometer focal plane array circuitry is disclosed for a microbolometer array having shared contacts between adjacent microbolometers. Various techniques may be applied to compensate for non-uniformities, such as for example, to allow operation over a calibrated temperature range.Type: GrantFiled: January 20, 2004Date of Patent: April 25, 2006Assignee: Indigo Systems CorporationInventors: William J. Parrish, Naseem Y. Aziz, Eric A. Kurth, John D. Schlesselmann
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Patent number: 7015715Abstract: Systems and methods are disclosed for measuring a distance (or gap) between substrates of a hybrid semiconductor. The measurements may be made during a hybridization process to, for example, provide alignment feedback during the hybridization process. The measurements may also be made after the hybridization process to further calibrate the process or to provide information useful for further processing operations.Type: GrantFiled: March 24, 2003Date of Patent: March 21, 2006Assignee: Indigo Systems CorporationInventors: William J. Parrish, Jeffrey B. Barton, Naseem Y. Aziz, Adrienne N. Costello
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Patent number: 6958478Abstract: In a microbolometer detector the individual transducers in the focal plane array are support by leg members that are attached to the underlying readout integrated circuit (ROIC) chip at locations underneath transducers other than transducer which they support. A variety of configurations are possible. For example, the leg members may be attached to the ROIC chip at locations under adjacent transducers on opposite sides or on the same side of the supported transducer, or at locations underneath transducers that are not immediately adjacent to the supported transducer. In this way the effective length of the leg members and therefore the thermal isolation of the transducer they support can be increased.Type: GrantFiled: May 19, 2003Date of Patent: October 25, 2005Assignee: Indigo Systems CorporationInventors: William A. Terre, James T. Woolaway, Hubert Jerominek, Christine Alain
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Patent number: 6929410Abstract: Systems and methods are disclosed for providing camera shutter mechanisms. For example, in accordance with an embodiment of the present invention, an improved camera shutter mechanism and techniques for manufacturing the camera shutter mechanism are disclosed.Type: GrantFiled: December 23, 2003Date of Patent: August 16, 2005Assignee: Indigo Systems CorporationInventors: Vu Nguyen, Larry Switzer, Kevin Takeuchi
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Patent number: 6875979Abstract: A calibration assembly employs a thermoelectric cooler to provide a calibration temperature for one calibration flag and a different calibration temperature for a second calibration flag. Either calibration flag is immediately available for insertion into the optical path when calibration of the thermal imaging device is required. Consequently, the time required to calibrate a thermal imaging device within a thermal imaging system is greatly reduced.Type: GrantFiled: October 3, 2002Date of Patent: April 5, 2005Assignee: Indigo Systems CorporationInventor: Richard D. Cope
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Patent number: 6852976Abstract: An infrared detector is disclosed having a first substrate made of indium phosphide and a first layer formed on the first substrate and made of indium gallium arsenide. The infrared detector further includes a second substrate, which is made of silicon and has a readout integrated circuit that is electrically coupled to the first layer. After the indium gallium arsenide material is formed, the first substrate is substantially thinned or removed by mechanical techniques and/or a chemical etch process to extend the spectral range of the infrared detector to wavelengths beyond that of a conventional infrared detector.Type: GrantFiled: September 26, 2002Date of Patent: February 8, 2005Assignee: Indigo Systems CorporationInventors: Jeffrey B. Barton, Theodore R. Hoelter
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Patent number: 6812465Abstract: Microbolometer circuitry and methods are disclosed to allow an individual microbolometer or groups of microbolometers, such as a microbolometer focal plane array, to operate over a wide temperature range. Temperature compensation is provided, such as through circuitry and/or calibration methods, to reduce non-uniform behavior over the desired operating temperatures. For example, the relative mismatch in the temperature coefficient of resistance of an active microbolometer and a reference microbolometer is compensated by employing a variable resistor in series with the active microbolometer. The variable resistor can be calibrated over the desired temperature range to minimize the affect of the relative mismatch. Various other circuit implementations, calibration methods, and processing of the microbolometer circuit output can be employed to provide further compensation.Type: GrantFiled: February 27, 2002Date of Patent: November 2, 2004Assignee: Indigo Systems CorporationInventors: William J. Parrish, Jeffrey L. Heath, Naseem Y. Aziz, Joseph Kostrzewa, George H. Poe
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Patent number: 6803555Abstract: Two-stage auto-zero amplifier circuits are disclosed, along with methods of auto-zeroing such amplifier circuits. The two-stage auto-zero amplifier circuit may be part of an electronics signal chain coupled to a detector element to process an electronic signal induced by illumination. In an exemplary embodiment, the auto-zero amplifier circuit includes a first stage, which includes a low-noise fixed gain amplifier, capacitively coupled to a second stage, which includes a high gain amplifier. In an exemplary embodiment of a method of auto-zeroing the two-stage auto-zero amplifier circuit, a first terminal of the detector element is decoupled from the auto-zero amplifier circuit, and the first stage of the auto-zero amplifier circuit is locally referenced to a second terminal of the detector element. An auto-zero voltage for the auto-zero amplifier circuit is stored between the first stage of the auto-zero amplifier circuit and the second stage of the auto-zero amplifier circuit.Type: GrantFiled: September 7, 2001Date of Patent: October 12, 2004Assignee: Indigo Systems CorporationInventors: William J. Parrish, Naseem Y. Aziz
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Publication number: 20040065822Abstract: A calibration assembly employs a thermoelectric cooler to provide a calibration temperature for one calibration flag and a different calibration temperature for a second calibration flag. Either calibration flag is immediately available for insertion into the optical path when calibration of the thermal imaging device is required. Consequently, the time required to calibrate a thermal imaging device within a thermal imaging system is greatly reduced.Type: ApplicationFiled: October 3, 2002Publication date: April 8, 2004Applicant: Indigo Systems CorporationInventor: Richard D. Cope
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Patent number: 6593562Abstract: An electro-optical sensor includes a detector pixel including a plurality of detector elements responsive to electromagnetic radiation, and a plurality of switches configurable to selectively combine signals from the detector elements in the detector pixel to provide a signal corresponding to a pixel in an image. The sensor may include a plurality of such detector pixels arranged, for example, in a linear array or in a two-dimensional array. Each of the detector pixels may have an associated group of switches configurable to selectively combine signals from the detector elements in the detector pixel.Type: GrantFiled: October 4, 2001Date of Patent: July 15, 2003Assignee: Indigo Systems CorporationInventors: William J. Parrish, Naseem Y. Aziz, Glenn T. Kincaid
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Patent number: 6550665Abstract: Methods of forming arrays of electrical interconnects between substrates are provided. These methods allow the use of large interconnect bump arrays to physically and electrically connect substrates without the need to use excess pressure on the substrates to form the interconnects, thus reducing damage to the substrates. To form the interconnects, an array of bumps is formed on a first substrate from a material that forms a eutectic composition with a second material. An array of bumps composed of the second material is formed on the second substrate. The arrays are aligned and the bumps contacted at a temperature above the eutectic temperature of the eutectic composition. Each of the bumps on the first substrate melts and diffuises into the corresponding bumps on the second substrate to form the interconnects.Type: GrantFiled: June 6, 2001Date of Patent: April 22, 2003Assignee: Indigo Systems CorporationInventors: William J. Parrish, Jeffrey B. Barton
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Patent number: 6465344Abstract: Methods for forming die that have minimal edge and surface damage are provided. Die formed by these methods are less susceptible to cracking and breakage. Thus, yield and performance of devices fabricated with die formed by these methods are advantageously improved. To form the die, trenches are formed in a wafer around the peripheral edge of the die by processes that cause only minimal damage to the edges of the die. The wafer is cut through the trenches into sections containing the die without contacting the edge of the die. The sections are then mounted onto a holder and thinned to produce the die.Type: GrantFiled: March 9, 2001Date of Patent: October 15, 2002Assignee: Indigo Systems CorporationInventor: Jeffrey Brian Barton
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Patent number: 6465798Abstract: Analog signal voltages are updated sequentially in a first sample-and-hold circuit, while an emitter element displays a pixel of a first display frame in response to a stored analog signal voltage in an isolated parallel second sample-and-hold circuit. After all unit cells are updated, the switches are reversed for the two parallel sample-and-hold circuits, displaying a pixel of a second display frame in response to an updated stored analog signal voltage in the first sample-and-hold circuit. The operation of the two parallel circuits alternates for each sequential frame. A constant current source in the unit cell provides constant power dissipation and temperature, independent from variations in emitter element current, up to a predetermined constant current limit. For emitter element currents greater than the predetermined limit, an independent current source in the unit cell is automatically activated without involving external control logic.Type: GrantFiled: September 8, 1999Date of Patent: October 15, 2002Assignee: Indigo Systems CorporationInventors: Theodore R. Hoelter, James T. Woolaway
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Patent number: 6344651Abstract: A differential current mode amplifier circuit (5,5′) includes a first circuit leg having a first current source providing a current I1 coupled in series with a first transistor (m1) at a first circuit node (n1). The first transistor has a control terminal for coupling to an input signal potential (Vs). Vs is obtained from a unit cell of a radiation detector array, and is indicative of a magnitude of an integrated, photon-induced charge. The first circuit leg outputs a first output current (Is). A second circuit leg includes a second current source providing a current I2 coupled in series with a second transistor (m2) at a second circuit node (n2). The second transistor has a control terminal for coupling to an input reference potential (Vr). The second circuit leg outputs a second output current (Ir). A resistance (Rs) is coupled between the first circuit leg and the second circuit leg at the first circuit node and the second node.Type: GrantFiled: October 27, 1999Date of Patent: February 5, 2002Assignees: Indigo Systems Corporation, Raytheon CompanyInventors: James T. Woolaway, William J. Parrish, Stephen H. Black
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Patent number: 6316777Abstract: A dual sample-and-hold architecture in each unit cell of a read-in-integrated-circuit (RIIC) provides maximum frame rate without frame overlap. Analog pixel signals are updated sequentially in one sample-and-hold capacitor, while an emitter element displays a pixel of a display frame in response to a stored analog signal voltage on an isolated second sample-and-hold capacitor. After all unit cells are updated, the signals on the two capacitors are combined, updating all emitter elements for the next frame. A voltage mode amplifier as an emitter driver provides a more nearly linear dependence of infrared power output on signal voltage than do previous transconductance amplifiers. A digital to analog converter (DAC) on the RIIC substrate results in a simplified interface to the RIIC and in an increased immunity to noise.Type: GrantFiled: April 2, 1999Date of Patent: November 13, 2001Assignee: Indigo Systems CorporationInventors: William J. Parrish, Naseem Y. Aziz, Jeffrey L. Heath, Theodore R. Hoelter
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Patent number: 6133596Abstract: A charge transfer structure (30) includes a substrate comprised of semiconductor material and, coupled to a surface of the substrate, a plurality of serially coupled devices each having a gate terminal. The plurality of serially coupled devices include a first single port device (D1) defining a first primary charge storage well, a second single port device (D3) defining a second primary charge storage well, a first two port device (D2) defining a first transfer device, a second two port device (D4) defining a second transfer device, and two instances of a third two port device each defining a cascode device (CD). The ports of these devices are serially coupled together in an order given by D1, D2, CD, D3, D4, CD for transferring charge between the first and second primary charge storage wells. Charge is inserted into and withdrawn from each of the first and second primary charge storage wells through a single diffusion that functions as both an input port and an output port.Type: GrantFiled: April 21, 1999Date of Patent: October 17, 2000Assignees: Raytheon Company, Indigo Systems CorporationInventors: James T. Woolaway, William J. Parrish, Stephen H. Black
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Patent number: 6028309Abstract: Correction for temperature-induced non-uniformities in the response characteristics of the microbolometers in an infrared focal plane array (FPA) is performed by applying a non-uniform corrective bias to the individual microbolometers. The corrective bias is applied either before or during the bias or integration period during which the detectors are sampled. The bias-correction can be applied to two-dimensional detector multiplexers at each column amplifier input, the reference potential for each column amplifier or the voltage supply for each detector element. The magnitude of each corrective bias is determined by calibrating the detectors at different temperatures and different levels of incident infrared radiation. According to another aspect of this invention, a microbolometer which is thermally-shorted to the substrate on which the read out integrated circuit (ROIC) is formed is used along with the sensing microbolometer to compensate for variations in temperature.Type: GrantFiled: February 10, 1998Date of Patent: February 22, 2000Assignee: Indigo Systems CorporationInventors: William J. Parrish, James T. Woolaway
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Patent number: 5756999Abstract: Correction for temperature-induced non-uniformities in the response characteristics of the microbolometers in an infrared focal plane array (FPA) is performed by applying a non-uniform corrective bias to the individual microbolometers. The corrective bias is applied either before or during the bias or integration period during which the detectors are sampled. The bias-correction can be applied to two-dimensional detector multiplexers at each column amplifier input, the reference potential for each column amplifier or the voltage supply for each detector element. The magnitude of each corrective bias is determined by calibrating the detectors at different temperatures and different levels of incident infrared radiation. According to another aspect of this invention, a microbolometer which is thermally-shorted to the substrate on which the read out integrated circuit (ROIC) is formed is used along with the sensing microbolometer to compensate for variations in temperature.Type: GrantFiled: February 11, 1997Date of Patent: May 26, 1998Assignee: Indigo Systems CorporationInventors: William J. Parrish, James T. Woolaway