Patents Assigned to Industrial Technology Research Institiute
  • Patent number: 7259124
    Abstract: The present invention discloses a hydrogen storage medium including a composite of an alloy and a catalyst/expandable graphite. The expandable graphite can be replaced by activated carbon. The catalyst content is 1-50% based on the weight of the medium, which can be Pd, Pt, Cu, Co or Ni. The alloy can be a Mg-based alloy, Ti-based alloy, La-based alloy, Mn-based alloy or Fe-based alloy. The present invention also discloses a process for preparing a hydrogen storage composite.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: August 21, 2007
    Assignee: Industrial Technology Research Institiute
    Inventors: Pei-Shan Yen, Ching-Sung Hsiao, Kong-Wei Cheng, Jau-Chyn Huang
  • Patent number: 5903168
    Abstract: A switchable I/O buffer for multi-chip modules comprising a conventional I/O buffer and a miniaturized I/O buffer. A path switch selects the conventional I/O buffer or the minaturized I/O buffer according to whether the I/O interconnection is for communication off the module or chip-to-chip communication within the module. The miniaturized I/O buffer comprises a single-ended I/O buffer without electrostatic discharge protection. Two layout structures are designed for the switchable I/O buffer. A first layout structure having its path switching control provided by either a cell-programmable method or a mask-programmable method can be used for a multi-chip module or a PWB single package. A second layout structure using a pad-programmable method to provide the path switching control is suitable for a multi-chip module with flip-chip attachment technology. Four different circuit implementations of the switchable I/O buffer are presented.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: May 11, 1999
    Assignee: Industrial Technology Research Institiute
    Inventors: Jyh-Ren Yang, Chung-Tao Chang, Ruey-Wen Chien
  • Patent number: 5774002
    Abstract: A clock recovery circuit is disclosed for recovering the data of a non-return to zero signal received at an optical transceiver. The clock recovery circuit includes an active element mixer for doubling the frequency of the received non-return to zero encoded digital signal. The mixer includes a delay element for delaying the received non-return to zero signal and an exclusive-OR circuit for exclusive-ORing the delayed and received non-return to zero signals. A SAW filter is also provided for recovering a clock from the frequency doubled signal outputted by the mixer.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: June 30, 1998
    Assignee: Industrial Technology Research Institiute
    Inventors: Song-Yuen Guo, Jin-San Ko